Semiconductor device, manufacturing method of semiconductor device, and operation method of semiconductor device

A manufacturing method of a semiconductor device, the manufacturing method comprising:

• forming a first insulator;
• forming a first conductor over the first insulator;
• forming a second insulator over the first conductor;
• processing the second insulator, the first conductor, and the first insulator to form a first stack including a first opening;
• forming a third insulator in contact with the first insulator, the first conductor, and the second insulator in the first opening;
• forming an oxide in contact with the third insulator;
• forming a fourth insulator in contact with the oxide;
• and
• forming a second conductor in contact with the fourth insulator.

An operation method of a semiconductor device, the semiconductor device comprising:

• a first transistor including a back gate;
• a second transistor including a back gate and a charge accumulation layer;
• and
• a third transistor including a back gate,
• wherein a channel formation region of each of the first to third transistors contains a metal oxide,
• wherein one of a source and a drain of the first transistor is electrically connected to one of a source and a drain of the second transistor, and
• wherein the other of the source and the drain of the second transistor is electrically connected to one of a source and a drain of the third transistor,
• the operation method comprising a writing operation and a reading operation,
• the writing operation comprising:
• an operation of applying first potential to a back gate of each of the first to third transistors;
• an operation of applying a high-level potential with which the first transistor is in an on state to a gate of the first transistor;
• and
• an operation of applying a third potential to a gate of the second transistor and an operation of applying a fourth potential to the other of the source and the drain of the first transistor for injecting an electron into the charge accumulation layer,
• the reading operation comprising:
• an operation of applying the first potential to the back gate of each of the first to third transistors;
• an operation of applying the high level potential at which the first transistor is in an on state to the gate of the first transistor;
• an operation of applying a high level potential at which the third transistor is in an on state to a gate of the third transistor;
• an operation of applying a fifth potential to the gate of the second transistor;
• an operation of applying a sixth potential to the other of the source and the drain of the first transistor;
• and
• an operation of applying a seventh potential to the other of the source and the drain of the third transistor,
• wherein the first potential is a negative potential.