US 2022/0068948 A1Published application

Semiconductor device

AssigneeKioxia Corporation

InventorsTakamasa ITO, Hiroshi MATSUMOTO

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Abstract

A semiconductor device includes a semiconductor substrate on which a first insulation film is provided. A first conductive film is on the first insulation film. First electrode films are on the first conductive film and stacked. A charge accumulation member is between one of the first electrode films and the semiconductor member. The first conductive film includes a main body arranged below the first electrode films and an outer peripheral portion provided in an outer periphery of the main body to be apart from the main body. First and second slits are alternately provided in the outer peripheral portion, and extend along the outer periphery of the main body. The first and second slits are apart from each other as viewed in the stacking direction, and partly overlap each other as viewed in a first direction directed from the main body toward the outer peripheral portion.

Claims20

Dependent claims

A semiconductor device comprising:

a semiconductor substrate;
a first insulation film provided on the semiconductor substrate;
a first conductive film provided on the first insulation film;
a plurality of first electrode films provided on the first conductive film and stacked to be apart from each other;
a semiconductor member extending in a stacking direction of the first electrode films in a stacked structure of the first electrode films;
and
a charge accumulation member provided between one of the first electrode films and the semiconductor member, wherein
the first conductive film includes
a main body arranged below the first electrode films,
an outer peripheral portion provided in an outer periphery of the main body to be apart from the main body, and
first and second slits alternately provided in the outer peripheral portion, extending along the outer periphery of the main body, being apart from each other as viewed in the stacking direction, and partly overlapping each other as viewed in a first direction directed from the main body toward the outer peripheral portion.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/124,808Filed 17 Dec 2020
Priority: JP 2020-1470551 Sep 2020
Published: 3 Mar 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10B 43/50
EEPROM devices comprising charge-trapping gate insulators: characterised by the boundary region between the core and peripheral circuit regions
H10B 43/10
EEPROM devices comprising charge-trapping gate insulators: characterised by the top-view layout
H10B 43/27
With source and drain on different levels, e.g. with sloping channels: the channels comprising vertical portions, e.g. U-shaped channels
H10B 43/40
EEPROM devices comprising charge-trapping gate insulators: characterised by the peripheral circuit region