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US 2022/0068935 A1Published application
Gap fill methods for dram
AssigneeApplied Materials, Inc.
InventorsPriyadarshi Panda, Seshadri Ganguli, Sang Ho Yu, Sung-Kwan Kang, Gill Yong Lee, Sanjay Natarajan, Rajib Lochan Swain, Jorge Pablo Fernandez
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Abstract
Methods of forming memory devices are described. Some embodiments of the disclosure utilize a low temperature anneal process to reduce bottom voids and seams in low melting point, low resistance metal buried word lines. Some embodiments of the disclosure utilize a high density dielectric cap during a high temperature anneal process to reduce bottom voids in buried word lines.
Claims11
A method of testing a memory device, the method comprising:
- forming a thickness of a metal layer within a plurality of trenches, each trench having a trench depth, the thickness at least filling the trench;
- recessing the metal layer to a predetermined depth to form a recessed metal layer;
- depositing a high density dielectric layer on the recessed metal layer;
- performing a high temperature anneal;
- removing the high density dielectric layer;
- and
- evaluating the metal layer for voids.
4 more elements
Dependencies are inferred from the claim text.