Integrated circuit package structure and method of manufacturing the same

A method of manufacturing IC package structure, comprising the following steps:

• providing more than one wafer;
• forming a redistribution layer (RDL) structure on a top surface of the wafer;
• forming a plurality of first cutting grooves on the wafer and the RDL structure correspondingly provided thereon in order to form a plurality of chips later, each of which has the RDL structure correspondingly provided thereon;
• forming a first molding compound layer of a molding compound structure on the wafer and the correspondingly provided RDL structure and in the correspondingly formed first cutting grooves;
• processing a bottom surface of the wafer to expose a bottom surface of each of the chips formed on the wafer and to expose portions of the first molding compound layer that are filled in the first cutting grooves on the wafer;
• and then, forming a second molding compound layer of the molding compound structure on the bottom surfaces of the chips and on the exposed portions of the first molding compound layer;
• forming a plurality of second cutting grooves on the portions of the first molding compound layer that are filled in the first cutting grooves and on portions of the second molding compound layer that are located corresponding to the first cutting grooves, so as to separate the chips from one another;
• providing an electromagnetic interference (EMI) shielding structure on outer surfaces of the first and the second molding compound layer on each of the chips;
• and
• exposing the RDL structure on each of the chips.