US 2022/0068720 A1Published application

Semiconductor devices and methods of manufacturing thereof

AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.

InventorsShu-Uei Jang, Shu-Yuan Ku, Shih-Yao Lin

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Abstract

A semiconductor device includes a first transistor, a second transistor, a third transistor, and a fourth transistor. The first and second transistors operate under a lower gate voltage than the third and fourth transistors. The first transistor has a first active gate structure and the second transistor has a second active gate structure. The first and second active gate structures are separated by a first gate isolation structure along a first direction. The third transistor has a third active gate structure and the fourth transistor has a fourth active gate structure. The third and fourth active gate structures are separated by a second gate isolation structure along the first direction. The variation of a first distance between respective sidewalls of the first gate isolation structure is equal to the variation of a second distance between respective sidewalls of the second gate isolation structure along the first direction.

Claims20

Dependent claims

A semiconductor device, comprising:

a substrate including a first area and a second area, wherein a first density of transistors formed in the first area is greater than a second density of transistors formed in the second area;
wherein the semiconductor device in the first area comprises:
a first semiconductor fin and a second semiconductor fin, both the first and second semiconductor fins extending along a first direction;
a first dielectric fin that extends along the first direction and is disposed between the first and second semiconductor fins, wherein the first dielectric fin has sidewalls separated by a first distance along a second direction perpendicular to the first direction;
and
a first gate isolation structure vertically disposed above the first dielectric fin, wherein the first gate isolation structure has sidewalls separated by a second distance along the second direction, and wherein the first distance is equal to the second distance;
and
wherein the semiconductor device in the second area comprises:
a third semiconductor fin and a fourth semiconductor fin, both the third and fourth semiconductor fins extending along the first direction;
a second dielectric fin that extends along the first direction and is disposed between the third and second fourth fins, wherein the second dielectric fin has sidewalls separated by a third distance along the second direction;
and
a second gate isolation structure vertically disposed above the second dielectric fin, wherein the second gate isolation structure has sidewalls separated by a fourth distance along the second direction, and wherein the fourth distance is less than the third distance.

9 more elements

A semiconductor device, comprising:

a first plurality of transistors;
and
a second plurality of transistors, the first plurality of transistors configured to operate under a lower gate voltage than the second plurality of transistors;
wherein the first plurality of transistors comprise a first transistor having a first active gate structure and a second transistor having a second active gate structure;
wherein the first and second active gate structures are separated from each other by a first dielectric fin and a first gate isolation structure along a first direction, the first dielectric fin having a first width along the first direction, the first gate isolation structure having a second width along the first direction, the first width being equal to the second width;
wherein the second plurality of transistors comprise a third transistor having a third active gate structure and a fourth transistor having a fourth active gate structure;
and
wherein the third and fourth active gate structures are separated from each other by a second dielectric fin and a second gate isolation structure along the first direction, the second dielectric fin having a third width along the first direction, the second gate isolation structure having a fourth width along the first direction, the third width being greater than the fourth width.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/007,555Filed 31 Aug 2020
Published: 3 Mar 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe
H10D 30/0243
Of fin field-effect transistors [FinFET]: using dummy structures having essentially the same shapes as the semiconductor bodies, e.g. to provide…
H10D 84/0151
The components including insulated gates, e.g. IGFETs: manufacturing their isolation regions
H10D 84/0153
Manufacturing their isolation regions: using gate cut processes