Method of manufacturing a semiconductor device and a semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsShahaji B. MORE, Chandrashekhar Prakash SAVANT, Chun Hsiung TSAI
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Abstract
In a method of manufacturing a semiconductor device, a gate dielectric layer is formed over a channel region in a gate space, one or more conductive layers are formed over the gate dielectric layer, a seed layer is formed over the one or more conductive layers, an upper portion of the seed layer is treated by introducing one or more elements selected from the group consisting of oxygen, nitrogen and fluorine, and a W layer is selectively formed on a lower portion of the seed layer that is not treated to fully fill the gate space with bottom-up filling approach.
Claims20
A method of manufacturing a semiconductor device, comprising:
- forming a gate dielectric layer over a channel region in a gate space;
- forming one or more conductive layers over the gate dielectric layer;
- forming a seed layer over the one or more conductive layers;
- treating an upper portion of the seed layer by introducing one or more elements selected from the group consisting of oxygen, nitrogen and fluorine;
- and
- forming a W layer on a lower portion of the seed layer that is not treated.
A method of manufacturing a semiconductor device, comprising:
- forming a fin structure, an upper portion of which protrudes from an isolation insulating layer disposed over a substrate;
- forming a sacrificial gate dielectric layer over the fin structure;
- forming a sacrificial gate electrode layer over the sacrificial gate dielectric layer;
- forming gate sidewall spacers;
- forming an interlayer dielectric layer;
- removing the sacrificial gate electrode layer and the sacrificial gate dielectric layer, thereby forming a gate space in which the upper portion of the fin structure is exposed;
- forming a gate dielectric layer over the upper portion of the fin structure in the gate space;
- forming one or more work function adjustment layers over the gate dielectric layer;
- forming a glue layer over the one or more work function adjustment layers;
- forming a seed layer over the glue layer;
- treating an upper portion of the seed layer by introducing one or more elements selected from the group consisting of oxygen, nitrogen and fluorine;
- and
- forming a body metal layer on a lower portion of the seed layer that is not treated to fully fill the gate space.
A semiconductor device, comprising:
- a fin structure protruding from an isolation insulating layer disposed over a substrate and having a channel region;
- a source/drain region disposed over the substrate;
- a gate dielectric layer disposed on the channel region;
- and
- a gate electrode layer disposed on the gate dielectric layer, wherein:
- the gate electrode layer includes:
- one or more work function adjustment layers over the gate dielectric layer;
- a glue layer over the one or more work function adjustment layers;
- a seed layer over the glue layer;
- and
- a body metal layer on the seed layer,
- wherein an upper portion of the seed layer contains a greater amount of one or more of oxygen, nitrogen or fluorine than a lower portion of the seed layer.
Dependencies are inferred from the claim text.