Non-volatile memory device and memory system including the same and program method thereof

A three dimensional (3D) non-volatile memory device, comprising:

• a memory cell array including a plurality of cell strings connected to a plurality of ground selection lines, a plurality of word lines and a plurality of string selection lines, each of the plurality of cell strings including a pillar structure comprising a ground selection transistor connected to a corresponding ground selection line among the plurality of ground selection lines, a plurality of memory cells connected to the plurality of word lines respectively, and a string selection transistor connected to a corresponding string selection line among the plurality of string selection lines, the ground selection transistor, the plurality of memory cells and the string selection transistor being stacked vertically over a substrate, wherein the memory cells comprise a first cell group and a second cell group stacked on the first cell group, and wherein at least one memory cell of the first cell group and at least one memory cell of the second cell group are used as dummy memory cells;
• an address decoder configured to supply voltages to the plurality of string selection lines, the plurality of word lines and the plurality of ground selection lines;
• a page buffer circuit configured to output bit data from selected ones of the memory cells of the memory cell array;
• control logic;
• and
• a voltage generator configured to supply the voltages to the address decoder in response to the control logic,
• wherein the 3D non-volatile memory device is configured to perform a first program operation and a second program operation,
• wherein, during the first program operation, the 3D non-volatile memory device is configured to:
• initialize channels of the plurality of cell strings through at least one of ground selection transistors of the plurality of cell strings,
• apply first voltages to ground selection lines to turn off ground selection transistors connected to the ground selection lines,
• apply a second voltage to a selected string selection line to turn on selected string selection transistor connected to the selected string selection line,
• apply third voltages to unselected string selection lines to turn off unselected string selection transistors connected to the unselected string selection lines, and
• apply a first program voltage to a first selected word line among the plurality of word lines, the first selected word line being connected to memory cells of the second cell group, and
• wherein, during the second program operation, the 3D non-volatile memory device is configured to:
• initialize the channels of the plurality of cell strings through the at least one of the ground selection transistors of the plurality of cell strings;
• apply the first voltages to the ground selection lines to turn on the selected ground selection transistors connected to the ground selection lines,
• apply the second voltage to the selected string selection line to turn on the selected string selection transistor connected to the selected string selection line,
• apply the third voltages to the unselected string selection lines to turn off the unselected string selection transistors connected to the unselected string selection lines, and
• apply a second program voltage to a second selected word line among the plurality of word lines, the second selected word line being connected to memory cells of the first cell group.

A storage device comprising:

• a controller configured to output a plurality of commands;
• and
• a three dimensional (3D) non-volatile memory device configured to receive the plurality of commands, perform a first program operation in response to a first command among the plurality of commands, and perform a second program operation in response to a second command among the plurality of commands,
• wherein the 3D non-volatile memory device comprises a memory cell array including a plurality of cell strings connected to a plurality of ground selection lines, a plurality of word lines and a plurality of string selection lines, each of the plurality of cell strings including a pillar structure comprising a ground selection transistor connected to a corresponding ground selection line among the plurality of ground selection lines, a plurality of memory cells connected to the plurality of word lines respectively, and a string selection transistor connected to a corresponding string selection line among the plurality of string selection lines, the ground selection transistor, the plurality of memory cells and the string selection transistor being stacked vertically over a substrate,
• wherein the memory cells comprise a first cell group and a second cell group stacked on the first cell group,
• wherein at least one memory cell of the first cell group and at least one memory cell of the second cell group are used as dummy memory cells,
• wherein, during the first program operation, the 3D non-volatile memory device is configured to:
• initialize channels of the plurality of cell strings through at least one of string selection transistors of the plurality of cell strings,
• apply first voltages to a plurality of ground selection lines to turn off ground selection transistors connected to the plurality of ground selection lines,
• apply a second voltage to a selected string selection line to turn on selected string selection transistor connected to the selected string selection line among the plurality of string selection line,
• apply third voltages to unselected string selection lines to turn off unselected string selection transistors connected to the unselected string selection lines among the plurality of string selection line, and
• apply a first program voltage to a first selected word line among the plurality of word lines, the first selected word line being connected to memory cells of the second cell group, and
• wherein, during the second program operation, the 3D non-volatile memory device is configured to:
• initializing the channels of the plurality of cell strings through the at least one of the string selection transistors of the plurality of cell strings;
• apply the first voltages to the plurality of ground selection lines to turn off the ground selection transistors connected to the plurality of ground selection lines,
• apply the second voltage to the selected string selection line to turn on the selected string selection transistor connected to the selected string selection line,
• apply the third voltages to the unselected string selection lines to turn off the unselected string selection transistors connected to the unselected string selection lines, and
• apply a second program voltage to a second selected word line among the plurality of word lines, the second selected word line being connected to memory cells of the first cell group.