Semiconductor memory apparatus and programming method thereof
AssigneeWinbond Electronics Corp.
InventorsMasaru Yano, Toshiaki Takeshita
Life of this patent
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Abstract
A semiconductor storage apparatus programming a memory cell through improved ISPP is introduced. A NAND flash memory programming method includes a step of selecting a page of a memory cell array and applying a programming pulse based on the ISPP to the selected page. The programming pulse applied by the ISPP includes a sacrificial programming pulse for which a program verification becomes unqualified due to an initial programming pulse and a last programming pulse having an increment larger than any increment of other programming pulses.
Claims14
A semiconductor memory apparatus, comprising:
- a NAND memory cell array;
- and
- a controller configured to apply a programming pulse based on an incremental step pulse programming in order to program a selected page of the NAND memory cell array;
- wherein the programming pulse comprises at least one sacrificial programming pulse such that a memory cell of the selected page cannot pass a program verification after being applied with the at least one sacrificial programming pulse, and the at least one sacrificial programming pulse comprises an initial programming pulse.
A NAND flash memory programming method, comprising a step of applying a programming pulse based on an incremental step pulse programming in order to program a selected page of a memory cell array,
- wherein the applied programming pulse comprises at least one sacrificial programming pulse such that a memory cell of the selected page cannot pass a program verification after being applied with the at least one sacrificial programming pulse, and the at least one sacrificial programming pulse comprises an initial programming pulse.
Dependencies are inferred from the claim text.