Devices and methods for adaptive retention voltage in volatile memory

An integrated circuit comprising:

• a volatile memory divided into a plurality of blocks;
• a voltage regulator configured to provide a supply voltage to each block of the plurality of blocks;
• a power gate control circuit configured to control power gating of the supply voltage for each block of the plurality of blocks;
• a power mode controller configured to select a power mode for the integrated circuit, wherein in response to selecting the retention mode, the power gate control circuit prevents the supply voltage from powering each block of a selected subset of the plurality of blocks and allows the supply voltage to power each block of a remaining subset of the plurality of blocks outside the selected subset of the plurality of blocks;
• and
• a voltage controller circuit configured to indicate a retention voltage level to the voltage regulator to provide as the supply voltage during the retention mode, wherein the voltage controller is configured to determine the retention voltage level based on a minimum retention voltage level required for each block of the remaining subset.

A method comprising:

• entering data retention mode for a volatile memory, wherein the volatile memory is divided into a plurality of blocks;
• in response to entering the data retention mode, selecting a retention subset of the plurality of blocks, wherein each block of the retention subset remains powered by a retention voltage while in the data retention mode and each block of the plurality of blocks not in the retention subset is powered down while in the data retention mode;
• and
• determining a voltage level of the retention voltage provided to each block of the retention subset during the retention mode based on a minimum retention voltage required for each block of the retention subset.