Multi-level signal receivers and memory systems including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsKwangseob SHIN, Jindo BYUN, Younghoon SON, Youngdon CHOI, Junghwan CHOI
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Abstract
A multi-level signal receiver includes a data sampler circuit and a reference voltage generator circuit. The data sampler includes (M−1) sense amplifiers which compare a multi-level signal having one of M voltage levels different from each other with (M−1) reference voltages. The data sampler generates a target data signal including N bits, M is an integer greater than two and N is an integer greater than one. The reference voltage generator generates the (M−1) reference voltages, At least two sense amplifiers of the (M−1) sense amplifiers have different sensing characteristics.
Claims20
A multi-level signal receiver comprising:
- a data sampler circuit including (M−1) sense amplifiers configured to compare a multi-level signal with (M−1) reference voltages, the data sampler circuit configured to generate a data signal including N bits, the multi-level signal having one of M voltage levels different from each other, M being an integer greater than two and N being an integer greater than one;
- and
- a reference voltage generator circuit configured to generate the (M−1) reference voltages,
- wherein at least two sense amplifiers of the (M−1) sense amplifiers have different sensing characteristics.
A memory system comprising:
- a memory controller configured to generate a multi-level signal based on input data, the multi-level signal having one of M voltage levels different from each other, M being an integer greater than two;
- and
- a memory device configured to receive the multi-level signal from the memory controller and compare the multi-level signal with (M−1) reference voltages to generate a data signal including N bits, N being an integer greater than one,
- wherein the memory device comprises:
- a data sampler circuit including (M−1) sense amplifiers configured to compare the multi-level signal with the (M−1) reference voltages to generate the data signal;
- and
- a reference voltage generator circuit configured to generate the (M−1) reference voltages, and
- wherein at least two sense amplifiers of the (M−1) sense amplifiers have different sensing characteristic.
An apparatus comprising:
- (M−1) sense amplifiers configured to compare a multi-level signal with (M−1) reference voltages and output one or more sense signals;
- and
- an output decoder configured to generate an output data signal based on the one or more sense signals, the output data signal including N bits,
- wherein the multi-level signal having one of M voltage levels different from each other, M being an integer greater than two and N being an integer greater than one,
- wherein the (M−1) sense amplifiers comprises:
- a first sense amplifier having a first voltage threshold;
- and
- a second sense amplifier having a second voltage threshold different from the first voltage threshold, and
- wherein the first voltage threshold and the second voltage threshold correspond to voltage thresholds for turning on a respective transistor in the first sense amplifier and the second sense amplifier.
Dependencies are inferred from the claim text.