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US 2022/0068333 A1Published application
Memory
AssigneeChangxin Memory Technologies, Inc.
InventorShu-Liang Nin
Life of this patent
Estimating the term…
Abstract
A memory is provided. The memory includes a control chip (114) and a plurality of memory chips (100). The plurality of memory chips are electrically connected to the control chip (114) by sharing a channel (01). The plurality of memory chips (100) are configured to adopt the same clock signal, and each of the plurality of memory chips (100) is configured to perform information interaction with the control chip (114) in a different clock state of the clock signal.
Claims20
A memory, comprising:
- a control chip;
- and
- a plurality of memory chips, the plurality of memory chips being electrically connected to the control chip by sharing a channel, the plurality of memory chips being configured to adopt the same clock signal, and each of the plurality of memory chips being configured to perform information interaction with the control chip in a different clock state of the clock signal.
Dependencies are inferred from the claim text.