Memory device for generating data strobe signal based on pulse amplitude modulation, memory controller, and memory system including the same

A memory system comprising:

• a memory device comprising a memory cell array;
• and
• a memory controller configured to control a memory operation of the memory device,
• wherein the memory device and the memory controller each transmit and receive a data strobe signal (DQS signal) comprising a different toggle pattern according to an operating condition of the memory system based on n-level pulse amplitude modulation (PAMn), and
• wherein n is an integer greater than or equal to 4.

A method of operating a memory device, the method comprising:

• receiving a first read command corresponding to a first operating condition;
• outputting, in response to the first read command, a first data signal (DQ signal) and a first data strobe signal (DQS signal) based on n-level pulse amplitude modulation (PAMn) and corresponding to the first operating condition;
• receiving a second read command corresponding to a second operating condition that is different from the first operating condition;
• and
• outputting, in response to the second read command, a second DQ signal and a second DQS signal based on PAMn and corresponding to the second operating condition,
• wherein the first DQS signal has a first toggle pattern different from a second toggle pattern of the second DQS signal.