Method for configuring multiple input-output channels
AssigneeMicron Technology, Inc.
InventorsDean E. Walker, Tony Brewer
Life of this patent
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Abstract
A system comprises an interposer including multiple conductive interconnects; multiple chiplets arranged on the interposer and interconnected by the interposer; each chiplet including a die-to-die physical layer interface including one or more pads to engage the interconnect of the interposer; and wherein at least one chiplet includes multiple input-output channels organized into at least one column and arranged in an order at a periphery of the chiplet forming a die-to-die physical layer interface to engage the interconnects of the interposer, wherein the order of the channels of the column is programmable.
Claims23
A system comprising:
- an interposer including multiple conductive interconnects;
- multiple chiplets arranged on the interposer and interconnected via the interposer, each chiplet including a die-to-die interface including one or more pads to engage the interconnect of the interposer;
- and
- wherein at least one chiplet includes multiple input-output channels organized into at least one column and arranged in an order at a periphery of the at least one chiplet forming the die-to-die interface to engage the interconnects of the interposer, wherein the order of the input-output channels of the column is programmable.
A method comprising:
- setting an order of input-output channels of a column of a first chiplet of multiple chiplets of a chiplet-based system, wherein one or more of the multiple chiplets include field-configurable input-output channels arranged at a periphery of the chiplets;
- and
- programming a second chiplet of the multiple chiplets to change an order of input-output channels of a column of the second chiplet to match the order of input-output channels of the column of the first chiplet.
A non-transitory machine-readable medium including instructions that, when executed by a system, cause the system to perform operations comprising:
- setting an order of channels of a column of a first chiplet of multiple chiplets of the system, wherein one or more chiplets of the multiple chiplets include input-output channels arranged as one or more columns at a periphery of the chiplets;
- and
- writing a value to a column configuration register of a second chiplet of the multiple chiplets to reverse an order of channels of a column of the second chiplet to match the order of channels of the column of the first chiplet.
A memory controller chiplet, comprising:
- a supporting substrate including a chiplet physical interface including multiple contacts spaced and configured to engage respective conductive interconnects on an interposer including multiple conductive interconnects:
- processing circuitry including one or more processors supported on the substrate, the memory controller chiplet configured to perform memory operations on a memory array;
- and
- wherein the chiplet interface includes multiple input-output channels organized into at least one column, and in a selected order, wherein the order of the channels of the column is programmable.
Dependencies are inferred from the claim text.