Estimating integrated circuit yield from modeled response to scaling of distribution samples

A system comprising:

• a memory system configured to store computer-executable instructions;
• and
• a computing system, in response to execution of the computer-executable instructions, is configured to:
• perform scaled sampling of parameter values in a foundry model describing parameter variations for a manufacturing process capable of fabricating an integrated circuit described in a circuit design, wherein the scaled sampling of the parameter values includes scaling a distribution of the parameter values in the foundry model and selecting samples of the parameter values from the scaled distribution;
• simulate the circuit design with the scaled samples of the parameter values;
• and
• estimate a yield for an output of the integrated circuit described by the circuit design based on a response of the circuit design to the scaled samples of the parameter values during the simulation.

An apparatus comprising at least one computer-readable memory device storing instructions configured to cause one or more processing devices to perform operations comprising:

• performing scaled sampling of parameter values in a foundry model describing parameter variations for a manufacturing process capable of fabricating an integrated circuit described in a circuit design, wherein the scaled sampling of the parameter values includes scaling a distribution of the parameter values in the foundry model and selecting samples of the parameter values from the scaled distribution;
• simulating the circuit design with the scaled samples of the parameter values;
• and
• estimating a yield for an output of the integrated circuit described by the circuit design based on a response of the circuit design to the scaled samples of the parameter values during the simulation.