Accelerator, method of operating an accelerator, and electronic device including an accelerator
AssigneeSamsung Electronics Co., Ltd.
InventorsHanmin PARK, Hyung-Dal KWON, Jaehyeong SIM, Seungwook LEE, Jae-Eon JO
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Abstract
An accelerator, a method of operating the accelerator, and an electronic device including the accelerator. A method of operating the accelerator configured to perform a target operation includes packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation and storing the packed input data in the memory, and performing the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
Claims21
A method of operating an accelerator configured to perform a target operation, the method comprising:
- packing input data with a data layout determined based on a word width of a memory in the accelerator and a spatial size of a filter to be applied to the target operation, and storing the packed input data in the memory;
- and
- performing the target operation between a portion of the packed input data stored in a same word in the memory and weights of the filter.
An accelerator configured to perform a target operation, comprising:
- a memory configured to store input data packed with a data layout determined based on a word width of the memory and a spatial size of a filter to be applied to the target operation;
- and
- an operator configured to perform the target operation between a portion of the input data stored in a same word in the memory and weights of the filter.
An electronic device, comprising:
- a host processor configured to generate an instruction executable by an accelerator in response to a request for processing, in the accelerator, a neural network in which a target operation is performed;
- and
- the accelerator configured to, when the instruction is executed, pack input data with a data layer determined based on a word width of an internal memory and a spatial size of a filter to be applied to the target operation and store the packed input data in the internal memory, and perform the target operation between a portion of the input data stored in a same word in the internal memory and weights of the filter.
An accelerator configured to perform a target operation, comprising:
- an input memory configured to pack input data into one word according to a data layout;
- a filter memory configured to store weights of a filter applied to the target operation;
- an operator comprising a plurality of multipliers configured to perform the target operation between the packed input data stored in a same word in the input memory and one or more of the weights stored in the filter memory;
- and
- a multiplexer selectively disposed between the operator and one of the input memory and the filter memory, wherein
- in a case in which the multiplexer is disposed between the operator and the filter memory, the multiplexer is configured to selectively transfer one of the weights stored in the filter memory to each of the multipliers of the operator, and
- in a case in which the multiplexer is disposed between the operator and the input register, the multiplexer is configured to selectively transfer one set of the packed input data stored in the input memory to each of the multipliers of the operator.
Dependencies are inferred from the claim text.