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US 2022/0066939 A1Published application
Servicing memory high priority read requests
AssigneeMicron Technology, Inc.
InventorRyan G. Fisher
Life of this patent
Estimating the term…
Abstract
Various embodiments described herein provide for a memory device that can service a high priority read request during data input without losing the data inputted to the memory device prior to the high priority read request, without re-requesting data from a host, and while leaving one or more internal resources of a memory sub-system available for use by an error correction function of the memory sub-system.
Claims20
A system comprising:
- a set of memory devices comprising an individual memory device;
- and
- a processing device, operatively coupled to the set of memory devices, configured to perform operations comprising:
- processing, by a cache register of the individual memory device, a current write request to write data input to the individual memory device, the data input comprising a series of data units;
- before completion of the processing the current write request, determining that a first high priority read request, to read from a first page of the individual memory device, exists;
- and
- in response to determining that the first high priority read request exists:
- stopping the processing the current write request;
- causing a first set of data units of the data input, currently stored on the cache register, to be stored to a second page of the individual memory device;
- generating first log data that describes an occurrence of the first high priority read request, identifies a first data location in the series of data units where the processing the current write request stopped, and identifies the second page where the first set of data units is stored;
- servicing the first high priority read request by the cache register;
- and
- after completion of the servicing the first high priority read request, resuming, based on the first log data, the processing the current write request from the first data location in the series of data units.
10 more elements
A method comprising:
- processing, by a cache register of a memory device, a current write request to write data input to a plane of a NAND-type memory device, the plane comprising a plurality of blocks, the cache register being associated with the plane, and the data input comprising a series of data units;
- before completion of the processing the current write request, determining that a first high priority read request, to read from a first page of a first block of the plurality of blocks, exists;
- and
- in response to determining that the first high priority read request exists:
- stopping the processing the current write request;
- causing a first set of data units of the data input, currently stored on the cache register, to be stored to a second page of a second block of the plurality of blocks, the second block being a single level cell (SLC) block;
- generating first log data that describes an occurrence of the first high priority read request, identifies a first data location in the series of data units where the processing the current write request stopped, and identifies the second page where the first set of data units is stored;
- servicing the first high priority read request by the cache register;
- and
- after completion of the servicing the first high priority read request, resuming, based on the first log data, the processing the current write request from the first data location in the series of data units.
7 more elements
At least one non-transitory machine-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
- while issuing a series of data units of data input to a cache register of a memory device for writing to the memory device, periodically determining whether at least one high priority read request exists for the memory device;
- and
- in response to determining that a high priority read request for a first page of the memory device exists:
- stopping the issuing the series of data units;
- causing a first set of data units, currently stored on the cache register, to be stored to a second page of the memory device;
- generating log data that describes an occurrence of the high priority read request, identifies a data location in the series of data units where the issuing the series of data units stopped, and identifies the second page where the first set of data units is stored;
- servicing the high priority read request by the cache register;
- and
- after completion of the servicing the high priority read request, resuming, based on the log data, the issuing the series of data units to the cache register for writing to the memory device by:
- causing the cache register to clear;
- and
- issuing one or more remaining data units, of the series of data units, to the cache register based on the data location identified by the log data;
- and
- after completion of the issuing the one or more remaining data units to the cache register, causing a second set of data units, currently stored on the cache register, to be stored to the second page.
11 more elements
Dependencies are inferred from the claim text.