Dynamic memory reconfiguration

A system comprising:

• a memory device;
• and
• a general-purpose graphics processor coupled to the memory device, wherein the general-purpose graphics processor includes:
• a cache memory including multiple memory banks;
• a cache controller coupled with the cache memory, the cache controller including a dynamic hash unit to select, based on a first hash function and an address associated with a memory access, one or more of the multiple memory banks to store data associated with the memory access;
• and
• cache monitor hardware to monitor an access pattern of the multiple memory banks and request the dynamic hash unit to select a second hash function in response to detection of a bank access pattern disparity over a threshold.

A method comprising:

• on a general-purpose graphics processor including a cache memory having multiple memory banks and a cache controller coupled with the cache memory:
• selecting, via the cache controller, a first set of one or more memory banks of the cache memory to access in response to a first memory access request to a first memory address, wherein the first set of one or more memory banks is selected based on an address associated with the first memory access request and a hash of the first memory address, the hash generated via a first hash function;
• monitoring an access pattern to the multiple memory banks of the cache memory;
• in response to detection of a bank access disparity, requesting the cache controller to change from the first hash function to a second hash function;
• and
• selecting, via the cache controller, a second set of one or more memory banks of the cache memory to access in response to a second memory access request to the first memory address.