Reduced parity data management
AssigneeMicron Technology, Inc.
InventorChun Sum Yeung
Life of this patent
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Abstract
A method includes receiving, by a memory sub-system, host data to be written to a plurality of blocks of a memory device associated with a memory sub-system, where each of the plurality of blocks are coupled to one of a plurality of word lines of the memory device. The method can further include generating parity data for each word line of the block; dividing the parity data into one of either a first word line parity set or a second word line parity set; generating a reduced parity data set with exclusive or parity values for the first word line parity set and for the second word line parity set; and writing the reduced parity data set in the memory sub-system.
Claims20
A method, comprising:
- receiving, by a memory sub-system, host data to be written to a plurality of blocks of a memory device associated with a memory sub-system, wherein each block is coupled to one of a plurality of word lines of the memory device;
- generating parity data for each word line of the memory device;
- dividing the parity data into one of either a first word line parity set or a second word line parity set;
- generating a reduced parity data set with exclusive or (XOR) parity values for the first word line parity set and for the second word line parity set, wherein a size of the reduced parity data set is reduced such that the reduced parity data set is stored by a quantity of word lines among the plurality of word lines that is less than a total quantity of word lines among the plurality of word lines associated with each block of the memory device;
- and
- writing the reduced parity data set in the memory sub-system utilizing less than a full block of the plurality of blocks of the memory device.
An apparatus, comprising:
- a reduced parity data management component configured to:
- receive host data to be written to a memory device of a memory sub-system;
- generate parity data for each word line of the memory device;
- divide the parity data into one of either a first word line parity set or a second word line parity set based on a predetermined indexing protocol;
- generate a reduced parity data set with exclusive or (XOR) parity values for the first word line parity set and for the second word line parity set, wherein a size of the reduced parity data set is reduced such that the reduced parity data set is stored by a quantity of word lines among the plurality of word lines that is less than a total quantity of word lines among the plurality of word lines associated with each block of the memory device;
- and
- write the reduced parity data set in the memory sub-system utilizing less than a full block of the plurality of blocks of the memory device upon a successful program operation on past page.
A system, comprising:
- a plurality of blocks each coupled to one of a plurality of word lines;
- and
- a processing device coupled to the plurality of blocks, the processing device to perform operations comprising:
- receiving host data to be written to a block of a memory device associated with the memory sub-system;
- generating parity data for each word line of the memory device;
- dividing the parity data into one of either a first word line parity set or a second word line parity set;
- generating a reduced parity data set with exclusive or (XOR) parity values for the first word line parity set and for the second word line parity set, wherein a size of the reduced parity data set is reduced such that the reduced parity data set is stored by a quantity of word lines among the plurality of word lines that is less than a total quantity of word lines among the plurality of word lines associated with each block of the memory device ;
- and
- writing the reduced parity data set in the memory sub-system utilizing less than a full block of the plurality of blocks of the memory device.
Dependencies are inferred from the claim text.