US 2022/0066873 A1 · TECHNIQUES FOR ERROR DETECTION AND CORRECTION IN A MEMORY SYSTEM

Abstract

Methods, systems, and devices for techniques for error detection and correction in a memory system are described. A host device may perform an error detection procedure on data received from the memory device, in addition to one or more error correction procedures that may be performed by the host device, the memory device, or both to correct transmission- or storage-related errors within the system. The error detection procedure may be configured to detect up to a quantity of errors within the data, where the quantity of errors may be greater than a quantity of errors reliably corrected by the one or more error correction procedures. For example, the error detection procedure may be configured to detect a sufficient quantity of errors so as to protect against possible aliasing errors associated with the one or more error correction procedures.

Claims20

Dependent claims

A method, comprising:

writing, to a memory device, data from a host device via an interface;
transmitting, to the memory device after writing the data, a read command from the host device for the data;
receiving, at the host device via the interface in response to the read command, the data after a first error correction procedure performed by the memory device on the data, the first error correction procedure to correct up to a first quantity of errors associated with the data being stored at the memory device, the first quantity greater than or equal to one;
performing, at the host device, a second error correction procedure on the data, the second error correction procedure to correct up to a second quantity of errors associated with the data being received via the interface, the second quantity greater than or equal to one;
and
performing, at the host device after the second error correction procedure, an error detection procedure to detect up to a third quantity of errors in the data, the third quantity greater than or equal to three.

3 more elements

Dependencies are inferred from the claim text.

Techniques for error detection and correction in a memory system

Life of this patent

Techniques for error detection and correction in a memory system

Life of this patent

Abstract

Claims20