Electronic apparatus and method for reducing number of commands

A method for reducing the number of commands, adapted for reducing the number of a plurality of register setting commands, the method comprising:

• generating a plurality of original register setting commands by a central processor, wherein each of the original register setting commands is adapted to set at least one bit of at least one register of a co-processor, the original register setting commands comprise a plurality of first original register setting commands, and a plurality of setting targets of the first original register setting commands have address continuity;
• merging the first original register setting commands to generate at least one merged register setting command by the central processor;
• and
• transmitting the at least one merged register setting command to the co-processor by the central processor.