Automated Error Correction with Memory Refresh
AssigneeMicron Technology, Inc.
InventorsHyun Yoo Lee, Kang-Yong Kim
Life of this patent
Estimating the term…
Loading patent…
AssigneeMicron Technology, Inc.
InventorsHyun Yoo Lee, Kang-Yong Kim
Estimating the term…
Described apparatuses and methods provide automated error correction with memory refresh. Memory devices can include error correction code (ECC) technology to detect or correct one or more bit-errors in data. Dynamic random-access memory (DRAM), including low-power double data rate (LPPDR) synchronous DRAM (SDRAM), performs refresh operations to maintain data stored in a memory array. A refresh operation can be a self-refresh operation or an auto-refresh operation. Described implementations can combine ECC technology with refresh operations to determine a data error with data that is being refreshed or to correct erroneous data that is being refreshed. In an example, data for a read operation is checked for errors. If an error is detected, a corresponding address can be stored. Responsive to the corresponding address being refreshed, corrected data is stored at the corresponding address in conjunction with the refresh operation. Alternatively, data being refreshed can be checked for an error.
A memory device comprising:
A method comprising:
A method comprising:
An apparatus comprising:
A method comprising:
Dependencies are inferred from the claim text.