Ratio-metric multi-sensing convertor
AssigneeCypress Semiconductor Corporation
InventorAndriy Maharyta
Life of this patent
Estimating the term…
Abstract
Apparatuses and methods of capacitance-to-digital code conversion are described. One apparatus includes a bridge circuit and a modulator front-end circuit. The bridge circuit includes a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell. The modulator front-end circuit includes a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator. The modulator front-end circuit provides a digital bitstream. A duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell.
Claims20
A capacitance-to-digital converter comprising:
- a bridge circuit comprising a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell;
- and
- modulator front-end circuit comprising a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream, wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell.
A method comprising:
- in a first phase, applying a supply voltage to charge a sensor electrode of a sensor cell to a first voltage level;
- in a second phase, coupling the sensor electrode to a first modulation capacitor to charge the first modulation capacitor, the first modulation capacitor being coupled to a first input of a comparator;
- in a third phase, coupling the sensor electrode to a ground potential to ground the sensor electrode;
- and
- in a fourth phase, coupling the sensor electrode to a second modulation capacitor to discharge the second modulation capacitor, the second modulation capacitor being coupled to a second input of the comparator, wherein modulator front-end circuit comprises the first modulation capacitor, the second modulation capacitor, and the comparator, the modulator front-end circuit to provide a digital bitstream, and wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of a reference cell.
A system comprising:
- a reference cell;
- a sensor cell;
- and
- a capacitance-to-digital converter comprising:
- a bridge circuit comprising a first terminal to couple to a reference cell and a second terminal to couple to a sensor cell;
- and
- modulator front-end circuit comprising a comparator coupled to the bridge circuit, a first modulation capacitor coupled to a first input of the comparator, and a second modulation capacitor coupled to a second input of the comparator, wherein the modulator front-end circuit is to provide a digital bitstream, wherein a duty cycle of the digital bitstream is representative of a ratio between a capacitance of the sensor cell and a reference capacitance of the reference cell.
Dependencies are inferred from the claim text.