Integrated circuit with biofets and fabrication thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTung-Tsun CHEN, Yi-Hsing HSIAO, Jui-Cheng HUANG, Yu-Jie HUANG
Life of this patent
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Abstract
An IC includes a source region and a drain region in a semiconductor layer. A channel region is between the source region and the drain region. A sensing well is on a back surface of the semiconductor layer and over the channel region. An interconnect structure is on a front surface of the semiconductor layer opposite the back surface of the semiconductor layer. A biosensing film lines the sensing well and contacts a bottom surface of the sensing well that is defined by the semiconductor layer. A coating of selective binding agent is over the biosensing film and configured to bind with a cardiac cell.
Claims20
An integrated circuit (IC), comprising:
- a source region and a drain region in a semiconductor layer;
- a channel region laterally between the source region and the drain region;
- a sensing well on a back surface of the semiconductor layer and over the channel region, wherein a bottom surface of the sensing well is defined by the semiconductor layer;
- an interconnect structure on a front surface of the semiconductor layer opposite the back surface of the semiconductor layer;
- a biosensing film lining the sensing well and contacting the bottom surface of the sensing well;
- and
- a coating of selective binding agent over the biosensing film and configured to bind with a cardiac cell.
An integrated circuit (IC), comprising:
- a semiconductor substrate having a source region and a drain region;
- a sensing well on a back surface of the semiconductor substrate;
- a biosening film lining the sensing well and contacting the back surface of the semiconductor substrate;
- a biological material coating layer over the biosensing film;
- and
- a first heater in the semiconductor substrate and laterally spaced from the source region and the drain region, the first heater vertically overlapping with the biological material coating layer.
A method, comprising:
- forming a semiconductor-on-insulator (SOI) substrate comprising a semiconductor substrate, a sacrificial substrate and a dielectric layer between the semiconductor substrate and the sacrificial substrate;
- forming source/drain regions in the semiconductor substrate;
- forming a back-end-of-line (BEOL) interconnect structure on a first side of the semiconductor substrate;
- bonding a carrier substrate to the semiconductor substrate through the BEOL interconnect structure;
- after bonding the carrier substrate to the semiconductor substrate;
- thinning the SOI substrate to remove the sacrificial substrate and to expose the dielectric layer;
- etching the dielectric layer until a second side of the semiconductor substrate is exposed, resulting in a sensing well extending through the dielectric layer and laterally between the source/drain regions;
- forming a biosensing film lining the sensing well;
- and
- immersing the biosensing film in a biological material bath until the biosensing film is coated with a biological material layer.
Dependencies are inferred from the claim text.