# US 2022/0045873 A1 · Security device including physical unclonable function cells and operation method thereof

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- Number: US 2022/0045873 A1
- Document ID: US20220045873A1
- Status: Published application
- Kind: A1
- Application number: 17/394,613
- Filed: 2021-08-05
- Published: 2022-02-10
- Earliest claimed: 2020-08-06
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: Hoyoung SHIN; Sung Ung KWAK; Ji-Sung KIM; Shin-Wuk KANG
- Web page: https://patentgrep.com/patent/US20220045873A1

## CPC

- H04L 9/3278: {using physically unclonable functions [PUF]}
- G06F 21/107: {License processing; Key processing}
- G06F 21/72: in cryptographic circuits
- G11C 7/06: Sense amplifiers; Associated circuits {, e.g. timing or triggering circuits}
- G11C 8/10: Decoders
- G11C 29/50: Marginal testing, e.g. race, voltage or current testing
- H03M 1/662: {Multiplexed conversion systems}
- H04L 9/0866: {involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics}
- G11C 2029/4402: {Internal storage of test result, quality data, chip identification, repair information}
- G11C 2029/5002: {Characteristic}
- H03M 1/765: {using a single level of switches which are controlled by unary decoded digital signals}
- H04L 2209/12: Details relating to cryptographic hardware or logic circuitry
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A security device includes a physical unclonable function (PUF) cell array including PUF cells connected with word lines and bit lines; first decoder circuitry connecting a first bit line connected to a target PUF cell with a first data line and a second bit line connected with a reference PUF cell to a second data line; a digital-to-analog converter (DAC) control circuit outputting first and second digital codes; a first DAC between a power supply voltage and the first data line, the first DAC generating a first analog output in response to the first digital code; a second DAC between the power supply voltage and the second data line, the second DAC generating a second analog output in response to the second digital code; and a sense amplifier comparing the first analog output and the second analog output and outputting a comparison result.

## Claims

### Claim 1

A security device comprising:
a physical unclonable function (PUF) cell array including a plurality of PUF cells, connected with a plurality of word lines and a plurality of bit lines;
first decoder circuitry configured to connect, from the plurality of bit lines, a first bit line connected to a target PUF cell with a first data line and to connect a second bit line connected to a reference PUF cell with a second data line;
a digital-to-analog converter (DAC) control circuit configured to output a first digital code and a second digital code;
a first digital-to-analog converter between a power supply voltage and the first data line, the first digital-to-analog converter configured to generate a first analog output in response to the first digital code;
a second digital-to-analog converter between the power supply voltage and the second data line, the second digital-to-analog converter configured to generate a second analog output in response to the second digital code; and
a sense amplifier configured to compare the first analog output and the second analog output and output the comparison result.

### Claim 2 (depends on 1)

The security device of claim 1, wherein
the first digital-to-analog converter includes
a plurality of first resistors connected in series between the power supply voltage and the first data line,
a plurality of first terminals between the plurality of first resistors, and
a first multiplexer configured to, in response the first digital code, select a first terminal of the plurality of first terminals and to connect the selected first terminal with a terminal from which the first analog output is output,
the second digital-to-analog converter includes
a plurality of second resistors connected in series between the power supply voltage and the second data line,
a plurality of second terminals between the plurality of second resistors, and
a second multiplexer configured to, in response to the second digital code, select a second terminal of the plurality of second terminals and to connect the selected second terminal with a terminal from which the second analog output is output, and
a resistance value of each of the plurality of first resistors and a resistance value of each of the plurality of second resistors the same.

### Claim 3 (depends on 2)

The security device of claim 2, wherein
the first analog output indicates a voltage obtained by diving a first voltage range based on the first digital code, the first voltage range derived from a voltage of the first data line to the power supply voltage, and
the second analog output indicates a voltage obtained by dividing a second voltage range based on the second digital code, the second voltage range derived from a voltage of the second data line to the power supply voltage.

### Claim 4 (depends on 1)

The security device of claim 1, wherein, in an initialization operation of the security device, the DAC control circuit is further configured to adjust the first digital code or the second digital code based on the comparison result and to output a digital output based on the adjusted first digital code or the adjusted second digital code.

### Claim 5 (depends on 4)

The security device of claim 4, wherein the digital output includes information about a magnitude of a mismatch value of the target PUF cell.

### Claim 6 (depends on 4)

The security device of claim 4, wherein
when the comparison result corresponds to a first logical value, the DAC control circuit adjusts the second digital code such that the second analog output increases, and
when the comparison result corresponds to a second logical value, the DAC control circuit adjusts the first digital code such that the first analog output increases.

### Claim 7 (depends on 6)

The security device of claim 6, wherein the DAC control circuit adjusts the first digital code or the second digital code based on at least one of a binary code, a Gray code, or a successive approximation register (SAR) manner.

### Claim 8 (depends on 1)

The security device of claim 1, wherein, in a normal operation of the security device, the DAC control circuit is further configured to maintain the first digital code and the second digital code at an initial value.

### Claim 9 (depends on 1)

The security device of claim 1, wherein
the first decoder circuitry includes a plurality of selectors respectively connected with the plurality of bit lines, and
each of the plurality of selectors is configured to connect a corresponding bit line with at least one of the first data line or the second data line or to disconnect the corresponding bit line from at least one of the first data line or the second data line.

### Claim 10 (depends on 1)

The security device of claim 1, further comprising:
second decoder circuitry configured to activate a word line connected with the target PUF cell or the reference PUF cell from among the plurality of word lines.

### Claim 11 (depends on 10)

The security device of claim 10, further comprising:
a control logic circuit configured to receive an address from an external device and to control at least one of the first decoder circuitry or the second decoder circuitry in response to the received address.

### Claim 12

A security device comprising:
a physical unclonable function (PUF) cell array including a plurality of PUF cells connected with a plurality of word lines and a plurality of bit lines;
first decoder circuitry configured to connect a first bit line, of the plurality of bit lines, connected to a target PUF cell with a first data line and to connect a second bit line, of the plurality of bit lines, connected with a reference PUF cell to a second data line;
a digital-to-analog converter (DAC) control circuit configured to output a digital code;
a digital-to-analog converter between a power supply voltage and the first data line, the digital-to-analog converter configured to generate a first analog output in response to the digital code;
a reference resistor circuit between the power supply voltage and the second data line, the reference resistor circuit configured to output a second analog output; and
a sense amplifier configured to compare the first analog output and the second analog output and to output the comparison result.

### Claim 13 (depends on 12)

The security device of claim 12, wherein the digital-to-analog converter includes:
a plurality of resistors connected in series between the power supply voltage and the first data line;
a plurality of terminals between the plurality of resistors; and
a multiplexer configured to select one terminal of the plurality of terminals in response to the digital code and to connect the selected one terminal with a terminal from which the first analog output is output.

### Claim 14 (depends on 13)

The security device of claim 13, wherein a resistance value of a resistor string including the plurality of resistors is identical to a resistance value of the reference resistor circuit.

### Claim 15 (depends on 12)

The security device of claim 12, further comprising:
a control logic circuit configured to control the first decoder circuitry,
wherein, when the comparison result indicates that the first analog output is greater than the second analog output, the DAC control circuit outputs a swap signal, and
wherein the control logic circuit controls the first decoder circuitry, in response to the swap signal, such that the bit line connected with the target PUF cell is swapped to the second data line and the bit line connected with the reference PUF cell swapped to the first data line.

### Claim 16 (depends on 12)

The security device of claim 12, wherein the DAC control circuit is configured to adjust the digital code in a successive approximation register (SAR) manner, based on the comparison result.

### Claim 17

An operation method of a security device including a plurality of physical unclonable function (PUF) cells, the method comprising:
connecting a target PUF cell of the plurality of PUF cells with a first data line;
connecting a reference PUF cell of the plurality of PUF cells with a second data line;
setting a first digital code and a second digital code to an initial value;
comparing a first analog output and a second analog output, wherein the first analog output is a voltage obtained by diving a first voltage range based on the first digital code, the first voltage range being derived from a voltage of the first data line to a power supply voltage, and the second analog output indicates a voltage obtained by dividing a second voltage range based on the second digital code, the second voltage range being derived from a voltage of the second data line to the power supply voltage;
adjusting one digital code of the first digital code or the second digital code based on a result of the comparison;
determining a mismatch value of the target PUF cell based on the one adjusted digital code from among the first digital code and the second digital code;
determining whether the target PUF cell is a weak cell, based on the mismatch value; and
storing an address corresponding to the target PUF cell when the target PUF cell is determined as the weak cell.

### Claim 18 (depends on 17)

The method of claim 17, wherein the initial value is determined such that the first analog output and the second analog output are respectively minimized within the first voltage range and the second voltage range.

### Claim 19 (depends on 17)

The method of claim 17, wherein the adjusting of the one digital code of the first digital code and the second digital code based on the comparison result includes:
determining whether the comparison result corresponds to a first logical value or a second logical value;
increasing the second digital code until the comparison result changes to the second logical value when the comparison result corresponds to the first logical value; and
increasing the first digital code until the comparison result changes to the first logical value when the comparison result corresponds to the second logical value.

### Claim 20 (depends on 19)

The method of claim 19, wherein,
as the second digital code increases, the second analog output gradually increases as much as a given magnitude, and
as the first digital code increases, the first analog output gradually increases as much as the given magnitude.