# US 2022/0045532 A1 · Semiconductor device and charge control system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2022/0045532 A1 - Document ID: US20220045532A1 - Status: Published application - Kind: A1 - Application number: 17/291,005 - Filed: 2019-11-12 - Published: 2022-02-10 - Earliest claimed: 2018-11-22 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Tatsuya ONUKI; Takayuki IKEDA; Shunpei YAMAZAKI - Web page: https://patentgrep.com/patent/US20220045532A1 ## CPC - H02J 7/61: against overcharge - H01M 10/44: Methods for charging or discharging (circuits for charging H02J7/00) - H01M 10/48: Accumulators combined with arrangements for measuring, testing or indicating the condition of cells, e.g. the level or density of the electrolyte (constructional details of current conducting connections for detecting conditions inside cells or batteries, e.g. details of voltage sensing terminals, H01M50/569) - H02H 7/18: for batteries; for accumulators - H02J 7/06: using discharge tubes or semiconductor devices - H02J 7/663: {using battery or load disconnect circuits (H02J9/002 takes precedence)} - H02J 7/70: characterised by the mechanical construction - H02J 50/10: using inductive coupling - H10D 30/6734: {having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs} - H10D 30/6211: {having fin-shaped semiconductor bodies integral with the bulk semiconductor substrates} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10W 20/496: {Capacitor integral with wiring layers} - Y02E 60/10: Energy storage using batteries - H02J: ELECTRIC POWER NETWORKS; CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY - H01M: PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY - H02H: EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS (indicating or signalling undesired working conditions G01R, e.g. G01R31/00, G08B; locating faults along lines G01R31/08; emergency protective devices H01H) - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 - Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION ## Abstract A structure that includes a circuit for controlling the safe operation of a secondary battery but can overcome space limitations owing to miniaturization of the housing is provided. A charge control circuit is provided over a flexible substrate and bonded to an external surface of the secondary battery. The charge control circuit is electrically connected to at least one of two terminals of the secondary battery and controls charging. To prevent overcharge, both an output transistor of a charging circuit and a blocking switch are brought into off state substantially concurrently. Blocking two paths which connect to the battery can quickly stop charging when overcharge is detected and reduce damage to the battery owing to the overcharge. ## Claims ### Claim 1 A charge control system comprising: a secondary battery; a first transmission path which is connected to a first terminal of the secondary battery and through which electric power output from the secondary battery is transmitted at the time of discharging; a charge control circuit which is connected to the first transmission path and over a flexible substrate so as to be in contact with a side surface of the secondary battery; a second transmission path which connects the charge control circuit and a second terminal of the secondary battery; a first switch which blocks the second transmission path; a charging circuit electrically connected to the charge control circuit; a power receiving circuit electrically connected to the charging circuit; an antenna electrically connected to the power receiving circuit; a third transmission path through which electric power is supplied from the power receiving circuit through the charging circuit to the secondary battery at the time of charging; and a second switch which blocks the third transmission path and is an output transistor of the charging circuit, wherein the first switch blocks the second transmission path when the secondary battery is overcharged, wherein in the case where the charge control circuit judges that there is abnormality during charging of the secondary battery, the second transmission path is blocked and charging is stopped, wherein the second switch blocks the third transmission path when the secondary battery is overcharged, and wherein the charging circuit notifies the power receiving circuit that charging has been completed. ### Claim 2 (depends on 1) The charge control system according to claim 1, wherein the first switch is a transistor comprising an oxide semiconductor. ### Claim 3 (depends on 1) The charge control system according to claim 1, wherein the second switch comprises an oxide semiconductor. ### Claim 4 (depends on 1) The charge control system according to claim 1, wherein the second switch is over a substrate different from a substrate for the first switch. ### Claim 5 A semiconductor device comprising: a secondary battery; a first transmission path which is connected to a first terminal of the secondary battery and through which electric power output from the secondary battery is transmitted at the time of discharging; a charge control circuit which is connected to the first transmission path and over a flexible substrate so as to be in contact with a side surface of the secondary battery; a second transmission path which connects the charge control circuit and a second terminal of the secondary battery; a blocking switch which blocks the second transmission path; and a charging circuit electrically connected to the charge control circuit, wherein the charge control circuit controls both the blocking switch and an output transistor of the charging circuit. ### Claim 6 (depends on 5) The semiconductor device according to claim 5, wherein the blocking switch is a transistor comprising an oxide semiconductor. ### Claim 7 (depends on 5) The semiconductor device according to claim 5, wherein the output transistor comprises an oxide semiconductor. ### Claim 8 (depends on 5) The semiconductor device according to claim 5, wherein the output transistor is over a substrate different from a substrate for the blocking switch. ### Claim 9 A charge control system comprising: a secondary battery; a charge control circuit electrically connected to the secondary battery; a charging circuit electrically connected to the charge control circuit; a first switch between the charge control circuit and one of a first terminal and a second terminal of the secondary battery; and a second switch as an output transistor of the charging circuit, wherein the secondary battery has a cylindrical shape, wherein the charge control circuit is over a flexible substrate which is attached to a side surface of the secondary battery, and wherein the charge control circuit is configured to turn off the first switch and the second switch in the case where abnormality of the secondary battery is detected. ### Claim 10 (depends on 9) The charge control system according to claim 9, wherein the first switch is a transistor comprising an oxide semiconductor. ### Claim 11 (depends on 9) The charge control system according to claim 9, wherein the second switch comprises an oxide semiconductor. ### Claim 12 (depends on 9) The charge control system according to claim 9, wherein the second switch is over a substrate different from a substrate for the first switch.