# US 2022/0045152 A1 · Display device

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- Number: US 2022/0045152 A1
- Document ID: US20220045152A1
- Status: Published application
- Kind: A1
- Application number: 17/510,040
- Filed: 2021-10-25
- Published: 2022-02-10
- Earliest claimed: 2019-03-14
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Jin Woo LEE; Jintaek KIM; Yeonhong KIM; Pilsuk LEE
- Web page: https://patentgrep.com/patent/US20220045152A1

## CPC

- H10D 86/481: {integrated with passive devices, e.g. auxiliary capacitors}
- H10K 59/1216: {the pixel elements being capacitors}
- H10D 86/411: {characterised by materials, geometry or structure of the substrates}
- H10D 86/431: {having different compositions, shapes, layouts or thicknesses of gate insulators in different TFTs}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 59/124: Insulating layers formed between TFT elements and OLED elements
- H10K 77/111: {Flexible substrates}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device includes: a substrate; a buffer layer on the substrate; a first active pattern and a second active pattern on the buffer layer and spaced apart from each other; a first gate insulation layer on the first active pattern and the second active pattern; a first gate electrode and a second gate electrode on the first gate insulation layer, the first gate electrode and the second gate electrode respectively overlapping the first active pattern and the second active pattern; a second gate insulation layer on the first gate electrode and the second gate electrode; and a capacitor electrode on the second gate insulation layer, the capacitor electrode overlapping the first gate electrode, wherein a permittivity of the first gate insulation layer is greater than a permittivity of the buffer layer.

## Claims

### Claim 1

A display device, comprising:
a substrate;
a first active pattern on the substrate;
a first high permittivity insulation layer on the first active pattern;
a first inorganic insulation layer on the first high permittivity insulation layer;
a second gate insulation layer on the first inorganic insulation layer; and
a capacitor electrode on the second gate insulation layer, the capacitor electrode overlapping the first active pattern,
wherein a permittivity of the first high permittivity insulation layer is greater than a permittivity of the first inorganic insulation layer.

### Claim 2 (depends on 1)

The display device of claim 1, wherein the first high permittivity insulation layer is patterned to overlap the first active pattern.

### Claim 3 (depends on 1)

The display device of claim 1, wherein a thickness of the first high permittivity insulation layer is less than a thickness of the first inorganic insulation layer.

### Claim 4 (depends on 1)

The display device of claim 1, further comprising:
a second active pattern between the substrate and the first inorganic insulation layer, the second active pattern being spaced from the first active pattern; and
a second gate electrode between the first inorganic insulation layer and the second gate insulation layer, the second gate electrode overlapping the second active pattern.

### Claim 5 (depends on 4)

The display device of claim 4, further comprising:
a second high permittivity insulation layer between the first inorganic insulation layer and the second gate electrode,
wherein a permittivity of the second high permittivity insulation layer is greater than the permittivity of the first inorganic insulation layer.

### Claim 6 (depends on 5)

The display device of claim 5, wherein the second high permittivity insulation layer is patterned to overlap the second active pattern.

### Claim 7 (depends on 5)

The display device of claim 5, wherein a thickness of the second high permittivity insulation layer is less than a thickness of the first inorganic insulation layer.

### Claim 8 (depends on 1)

The display device of claim 1, further comprising:
a first gate electrode between the first inorganic insulation layer and the second gate insulation layer, the first gate electrode overlapping the first active pattern.

### Claim 9 (depends on 8)

The display device of claim 8, wherein the second gate insulation layer comprises a second inorganic insulation layer and a third high permittivity insulation layer having a permittivity greater than a permittivity of the second inorganic insulation layer.

### Claim 10 (depends on 9)

The display device of claim 9, wherein the third high permittivity insulation layer is on the second inorganic insulation layer.

### Claim 11 (depends on 9)

The display device of claim 9, wherein the third high permittivity insulation layer is patterned to overlap the first gate electrode.

### Claim 12 (depends on 9)

The display device of claim 9, wherein a thickness of the third high permittivity insulation layer is less than a thickness of the second inorganic insulation layer.

### Claim 13 (depends on 1)

The display device of claim 1, further comprising:
a buffer layer between the substrate and the first active pattern,
wherein the permittivity of the first high permittivity insulation layer is greater than a permittivity of the buffer layer.

### Claim 14 (depends on 1)

The display device of claim 1, further comprising:
an insulation interlayer on the capacitor electrode; and
a source electrode and a drain electrode on the insulation interlayer and connected to the first active pattern,
wherein the permittivity of the first high permittivity insulation layer is greater than a permittivity of the insulation interlayer.

### Claim 15 (depends on 14)

The display device of claim 14, further comprising:
a planarization layer on the source electrode and the drain electrode;
a first electrode on the planarization layer and connected to the drain electrode;
an emission layer on the first electrode; and
a second electrode on the emission layer.