# US 2022/0045024 A1 · Driving chip and display panel

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- Number: US 2022/0045024 A1
- Document ID: US20220045024A1
- Status: Published application
- Kind: A1
- Application number: 17/509,000
- Filed: 2021-10-24
- Published: 2022-02-10
- Earliest claimed: 2019-04-11
- Assignees: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Applicants: Wuhan China Star Optoelectronics Technology Co., Ltd.
- Inventors: Yantao LU; Guanghui LIU; Chao WANG
- Web page: https://patentgrep.com/patent/US20220045024A1

## CPC

- G02F 1/1345: Conductors connecting electrodes to cell terminals
- H10W 72/90: Bond pads, in general
- H05K 1/111: {Pads for surface mounting, e.g. lay-out}
- G02F 1/13452: {Conductors connecting driver circuitry and terminals of panels}
- G02F 1/13458: {Terminal pads}
- H05K 1/117: {Pads along the edge of rigid circuit boards, e.g. for pluggable connectors}
- H05K 1/118: {specially for flexible printed circuits, e.g. using folded portions}
- H05K 1/147: {at least one of the printed circuits being bent or folded, e.g. by using a flexible printed circuit (H05K1/148 takes precedence)}
- H05K 2201/094: Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
- H05K 2201/10128: Display
- H05K 2201/10136: Liquid Crystal display [LCD]
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10W 72/07553: {changes in shapes}
- H10W 72/07554: {changes in dispositions}
- H10W 72/537: {Multiple bond wires having different shapes}
- H10W 72/5449: {not being orthogonal to a side surface of the chip, e.g. fan-out arrangements}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/932: {Plan-view shape, i.e. in top view}
- H10W 72/9445: {Top-view layouts, e.g. mirror arrays}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS

## Abstract

A driving chip and a display panel are provided. The display panel includes the driving chip, and a plurality of first bonding pads and a plurality of second bonding pads disposed at two opposite sides out of the driving chip. The driving chip includes a group of first input leads and a group of second input leads. There is an interval between the group of first input leads and the group of second input leads. The group of first input leads is disposed near the first bonding pads, and the group of second input leads is disposed near the second bonding pads.

## Claims

### Claim 1

A display panel, comprising:
a display area;
a non-display area located at the outside of the display area;
a driving chip disposed in the non-display area; and
a plurality of first bonding pads and a plurality of second bonding pads disposed at two opposite sides out of the driving chip and disposed in the non-display area;
wherein the driving chip comprises a plurality of input leads comprising a group of first input leads and a group of second input leads, wherein the group of first input leads is disposed near the plurality of first bonding pads, wherein the group of second input leads is disposed near the plurality of second bonding pads, and wherein there is an interval between the group of first input leads and the group of second input leads.

### Claim 2 (depends on 1)

The display panel of claim 1, wherein each of the group of first input leads is electrically connected to each of the plurality of first bonding pads through conducting wires, and wherein each of the group of second input leads is electrically connected to each of the plurality of second bonding pads through the conducting wires.

### Claim 3 (depends on 1)

The display panel of claim 1, wherein the group of first input leads and the group of second input leads are disposed side by side at the same side of the driving chip.

### Claim 4 (depends on 3)

The display panel of claim 3, wherein the driving chip further comprises a plurality of output leads.

### Claim 5 (depends on 4)

The display panel of claim 4, wherein the plurality of output leads are disposed at sides of the group of first input leads and the group of second input leads, opposite to each other.

### Claim 6 (depends on 4)

The display panel of claim 4, wherein the driving chip further comprises a plurality of virtual leads.

### Claim 7 (depends on 6)

The display panel of claim 6, wherein the plurality of output leads, the group of first input leads, and the group of second input leads are disposed side by side at a side of the driving chip, away from the display area.

### Claim 8 (depends on 7)

The display panel of claim 7, wherein the plurality of output leads are located between the group of first input leads and the group of second input leads, and wherein the plurality of virtual leads are located at a side of the driving chip, near the display area.

### Claim 9 (depends on 8)

The display panel of claim 8, wherein the plurality of first bonding pads, near the group of first input leads, are electrically connected to the group of first input leads, near the plurality of first bonding pads, through first conducting wires, wherein the plurality of first bonding pads, away from the group of first input leads, are electrically connected to the group of first input leads, away from the plurality of first bonding pads, through second conducting wires.

### Claim 10 (depends on 7)

The display panel of claim 7, wherein the plurality of output leads, the group of first input leads, and the group of second input leads are disposed side by side at a side of the driving chip, near the display area, wherein the plurality of output leads are located between the group of first input leads and the group of second input leads, and wherein the plurality of virtual leads are located at a side of the driving chip, away from the display area.

### Claim 11 (depends on 10)

The display panel of claim 10, wherein the plurality of first bonding pads, near the group of first input leads, are electrically connected to the group of first input leads, away from the plurality of first bonding pads, through first conducting wires, and wherein the plurality of first bonding pads, away from the group of first input leads, are electrically connected to the group of first input leads, near the plurality of first bonding pads, through second conducting wires.

### Claim 12 (depends on 7)

The display panel of claim 7, wherein the plurality of output leads are located at a side of the driving chip, near the display area, wherein the plurality of virtual leads, the group of first input leads, and the group of second input leads are disposed side by side at a side of the driving chip, away from the display area, and wherein the plurality of virtual leads are located between the group of first input leads and the group of second input leads.

### Claim 13 (depends on 2)

The display panel of claim 2, wherein heights of a part of the plurality of first bonding pads and heights of a part of the plurality of second bonding pads increase gradually from a side near the driving chip to a side away from the driving chip.

### Claim 14 (depends on 13)

The display panel of claim 13, wherein a first bonding pad group is composed of the part of the plurality of first bonding pads, wherein a third bonding pad group is composed of the part of the plurality of second bonding pads, wherein the plurality of first bonding pads of the first bonding pad group are arranged continuously or discontinuously, and wherein the plurality of second bonding pads of the third bonding pad group are arranged continuously or discontinuously.

### Claim 15

A driving chip, comprising a plurality of input leads comprising a group of first input leads and a group of second input leads, wherein the group of first input leads and the group of second input leads are disposed at an interval;
wherein the group of first input leads are configured to connect a plurality of first bonding pads out of the driving chip; and
wherein the group of second input leads are configured to connect a plurality second bonding pads out of the driving chip.

### Claim 16 (depends on 15)

The driving chip of claim 15, wherein the group of first input leads and the group of second input leads are disposed side by side at the same side of the driving chip.

### Claim 17 (depends on 16)

The driving chip of claim 16, further comprising a plurality of output leads, wherein the plurality of output leads are disposed at sides of the first input leads and the second input leads, opposite to each other.

### Claim 18 (depends on 16)

The driving chip of claim 16, further comprising a plurality of virtual leads, wherein the plurality of virtual leads, the group of first input leads, and the group of second input leads are disposed side by side.

### Claim 19 (depends on 18)

The driving chip of claim 18, wherein the plurality of virtual leads are located between the group of first input leads and the group of second input leads.

### Claim 20 (depends on 16)

The driving chip of claim 16, further comprising a plurality of virtual leads, wherein the plurality of virtual leads are disposed at sides of the group of first input leads and the group of second input leads, opposite to each other.