# US 2022/0044982 A1 · Amplifier with integrated temperature sensor

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- Number: US 2022/0044982 A1
- Document ID: US20220044982A1
- Status: Published application
- Kind: A1
- Application number: 16/986,088
- Filed: 2020-08-05
- Published: 2022-02-10
- Earliest claimed: 2020-08-05
- Assignees: NXP USA, Inc.
- Applicants: NXP USA, Inc.
- Inventors: Lionel Mongin; David Paul Lester; Philippe Renaud
- Web page: https://patentgrep.com/patent/US20220044982A1

## CPC

- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10W 40/00: Arrangements for thermal protection or thermal control (integrated devices comprising arrangements for thermal protection H10D89/60)
- H03F 1/30: Modifications of amplifiers to reduce influence of variations of temperature or supply voltage {or other physical parameters (in differential amplifiers H03F3/45479)}
- H03F 3/213: in integrated circuits
- H03F 3/45475: {using IC blocks as the active amplifying circuit}
- H10W 42/60: protecting against electrostatic charges or discharges, e.g. Faraday shields (integrated devices comprising arrangements for electrical protection H10D89/60)
- H10W 44/20: at high-frequency [HF] or radio frequency [RF]
- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/461: {specially adapted for cooling}
- H10W 70/465: {Bumps or wires}
- H10W 70/481: {for devices being provided for in groups H10D8/00 - H10D48/00}
- H03F 2200/222: A circuit being added at the input of an amplifier to adapt the input impedance of the amplifier
- H03F 2200/387: A circuit being added at the output of an amplifier to adapt the output impedance of the amplifier
- H03F 2200/447: the amplifier being protected to temperature influence
- H03F 2200/451: the amplifier being a radio frequency amplifier
- H10W 44/226: {for HF amplifiers}
- H10W 44/231: {Arrangements for applying bias}
- H10W 44/234: {Arrangements for impedance matching}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H03F: AMPLIFIERS

## Abstract

A device includes a semiconductor die including a transistor. The transistor includes a plurality of parallel transistor elements. Each transistor element includes a drain region, a source region, and a gate region. The semiconductor die includes a first temperature sensor between a first transistor element in the plurality of transistor elements and a second transistor element in the plurality of transistor elements. The first temperature sensor is configured to generate a first output signal having a magnitude that is proportional to a temperature of the first temperature sensor.

## Claims

### Claim 1

A system, comprising:
a semiconductor die, including:
a transistor formed in an active area of the semiconductor die, the transistor including an output terminal and a control terminal,
a first temperature sensor contact pad, and
a first temperature sensor, wherein a first portion of the active area is on a first side of the first temperature sensor and a second portion of the active area is on a second side of the first temperature sensor opposite the first side, the first temperature sensor is between the control terminal and the output terminal, the first temperature sensor is coupled to the first temperature sensor contact pad, and the first temperature sensor is configured to generate a first output signal at the first temperature sensor contact pad, wherein a magnitude of the first output signal is proportional to a temperature of the first temperature sensor; and
a control circuit coupled to the first temperature sensor contact pad, wherein the control circuit is configured to:
determine that a magnitude of the first output signal of the first temperature sensor has passed a threshold, and
in response to determining the magnitude of the first output signal of the first temperature sensor has passed the threshold, modify an operation of the transistor.

### Claim 2 (depends on 1)

The system of claim 1, wherein the transistor includes a plurality of drain regions coupled to the output terminal of the transistor and a plurality of gates coupled to the control terminal of the transistor.

### Claim 3 (depends on 2)

The system of claim 2, wherein the plurality of drain regions and the gates are arranged in a plurality of transistor elements, and the first temperature sensor is between a first transistor element of the plurality of transistor elements and a second transistor element of the plurality of transistor elements.

### Claim 4 (depends on 3)

The system of claim 3, wherein the semiconductor die includes a second temperature sensor contact pad and a second temperature sensor coupled to the second temperature sensor contact pad, wherein the second temperature sensor is between the second transistor element of the plurality of transistor elements and a third transistor element of the plurality of transistor elements.

### Claim 5 (depends on 4)

The system of claim 4, wherein the second temperature sensor is configured to generate a second output signal at the second temperature sensor contact pad, wherein the second output signal is proportional to a temperature of the second temperature sensor and the control circuit is configured to modify the operation of the transistor when a magnitude of the second output signal of the second temperature sensor has passed the threshold.

### Claim 6 (depends on 2)

The system of claim 2, further comprising a signal source coupled to the control terminal, wherein the signal source is configured to supply an input signal to the control terminal of the transistor and the control circuit is configured to modify an operation of the transistor by causing the signal source to reduce a magnitude of the input signal.

### Claim 7 (depends on 2)

The system of claim 2, further comprising a gate bias controller coupled to the control terminal, wherein the gate bias controller is configured to supply a gate bias voltage to the control terminal of the transistor and the control circuit is configured to modify an operation of the transistor by causing the gate bias controller to reduce a magnitude of the gate bias voltage.

### Claim 8 (depends on 1)

The system of claim 1, wherein the first temperature sensor includes at least one polysilicon diode.

### Claim 9 (depends on 8)

The system of claim 8, wherein the at least one polysilicon diode includes a plurality of regions of a first doping type and a plurality of regions of a second doping type, and the plurality of regions of the first doping type are interdigitated with the plurality of regions of the second doping type.

### Claim 10

A device, comprising:
a semiconductor die, including:
a transistor, the transistor including a plurality of parallel transistor elements, wherein each transistor element includes a drain region, a source region, and a gate region, and
a first temperature sensor between a first transistor element in the plurality of transistor elements and a second transistor element in the plurality of transistor elements, wherein the first temperature sensor is configured to generate a first output signal having a magnitude that is proportional to a temperature of the first temperature sensor.

### Claim 11 (depends on 10)

The device of claim 10, wherein the first temperature sensor includes at least one polysilicon diode.

### Claim 12 (depends on 11)

The device of claim 11, wherein the at least one polysilicon diode includes a plurality of regions of a first doping type and a plurality of regions of a second doping type and the plurality of regions of the first doping type are interdigitated with the plurality of regions of the second doping type.

### Claim 13 (depends on 10)

The device of claim 10, wherein the semiconductor die includes a second temperature sensor between the second transistor element of the plurality of transistor elements and a third transistor element of the plurality of transistor elements, and wherein the second temperature sensor is configured to generate a second output signal having a magnitude that is proportional to a temperature of the second temperature sensor.

### Claim 14 (depends on 13)

The device of claim 13, further comprising a control circuit configured to modify an operation of the transistor when the magnitude of the first output signal or the magnitude of the second output signal passes a threshold.

### Claim 15 (depends on 14)

The device of claim 14, wherein the control circuit is configured to modify the operation of the transistor by reducing a magnitude of an input signal to the transistor or inhibiting an operation of the transistor.

### Claim 16

A radio frequency (RF) amplifier device, comprising:
a device package including at least a first package lead, a second package lead, and a third package lead, the device package encasing:
a semiconductor die, including:
a transistor, and
a first temperature sensor that is coupled to the third package lead, wherein the first temperature sensor is configured to generate a first output signal at the third package lead, wherein a magnitude of the first output signal is proportional to a temperature of the first temperature sensor.

### Claim 17 (depends on 16)

The RF amplifier device of claim 16, wherein the transistor a plurality of parallel transistor elements, and the first temperature sensor is between a first transistor element of the plurality of transistor elements and a second transistor element of the plurality of transistor elements.

### Claim 18 (depends on 17)

The RF amplifier device of claim 17, wherein the device package includes a fourth package lead and the semiconductor die includes a second temperature sensor that is coupled to the fourth package lead, wherein the second temperature sensor is between the second transistor element of the plurality of transistor elements and a third transistor element of the plurality of transistor elements.

### Claim 19 (depends on 16)

The RF amplifier device of claim 16, wherein the first temperature sensor includes at least one polysilicon diode.

### Claim 20 (depends on 19)

The RF amplifier device of claim 19, wherein the at least one polysilicon diode includes a plurality of regions of a first doping type and a plurality of regions of a second doping type and the plurality of regions of the first doping type are interdigitated with the plurality of regions of the second doping type.