# US 2022/0044754 A1 · Data storage system with intelligent error management

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- Number: US 2022/0044754 A1
- Document ID: US20220044754A1
- Status: Published application
- Kind: A1
- Application number: 17/394,738
- Filed: 2021-08-05
- Published: 2022-02-10
- Earliest claimed: 2020-08-05
- Assignees: Seagate Technology LLC
- Applicants: Seagate Technology LLC
- Inventors: Jeremy B. Goolsby; Ryan J. Goss; Indrajit Prakash Zagade; Thomas V. Spencer; Jeffrey J. Pream; Christopher A. Smith; Charles McJilton
- Web page: https://patentgrep.com/patent/US20220044754A1

## CPC

- G11C 29/42: using error correcting codes [ECC] or parity check
- G06F 11/073: {in a memory management context, e.g. virtual memory or cache management (memory management G06F12/00; testing of static memory units G11C29/00)}
- G06F 11/0766: {Error or fault reporting or storing}
- G06F 11/3037: {where the computing system component is a memory, e.g. virtual memory, cache (accessing, addressing or allocating within memory systems or architectures G06F12/00; checking stores for correct operation G11C29/00)}
- G11C 29/021: {in voltage or current generators}
- G11C 29/028: {with adaption or trimming of parameters}
- G11C 29/12005: {comprising voltage or current generators}
- G11C 29/18: Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
- G11C 29/4401: {for self repair}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- G11C 2029/0411: {Online error correction}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

A data storage system may connect a non-volatile memory to a quarantine module that generates a quarantine strategy in response to a pending data access request to the non-volatile memory. The quarantine strategy can proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory. A comparison of a volume of errors for the non-volatile memory to a first threshold of the quarantine strategy with the quarantine module may prompt the alteration of a first status level of the plurality of status levels for a first physical data address of the non-volatile memory, as directed by the quarantine strategy.

## Claims

### Claim 1

An apparatus comprising a non-volatile memory connected to a quarantine module configured to generate a quarantine strategy in response to a pending data access request to the non-volatile memory, the quarantine strategy proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory, the quarantine module altering a status level of the plurality of status levels for a physical data address of the non-volatile memory in response to a volume of errors for the physical data address compared to a threshold number of errors, as directed by the quarantine strategy.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the quarantine module comprises a prediction circuit configured to predict the volume of errors for the physical data address.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the quarantine module comprises an error circuit configured to alter an error granularity in response to an error rate of the non-volatile memory.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein the quarantine module comprises a characterization circuit configured to conduct an in-drive reference voltage recalibration for at least one memory cell of the non-volatile memory as directed by the quarantine strategy.

### Claim 5 (depends on 4)

The apparatus of claim 4, wherein the in-drive reference voltage recalibration is carried out with a controller of a data storage device in which the non-volatile memory resides.

### Claim 6

A method comprising:
connecting a non-volatile memory to a quarantine module;
generating a quarantine strategy in response to a pending data access request to the non-volatile memory, the quarantine strategy proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory;
comparing a volume of errors for the non-volatile memory to a first threshold of the quarantine strategy with the quarantine module;
altering a first status level of the plurality of status levels for a first physical data address of the non-volatile memory, as directed by the quarantine strategy, in response to the comparison of errors to the first threshold; and
changing a second status level of the plurality of status levels for a second physical data address of the non-volatile memory, as directed by the quarantine strategy, in response to the comparison of errors to a second threshold, the first and second status levels conducted concurrently by the quarantine module.

### Claim 7 (depends on 6)

The method of claim 6, wherein the first status level increases an error detection refresh rate for the first physical data address.

### Claim 8 (depends on 6)

The method of claim 6, wherein the first status level increases an error detection granularity for the non-volatile memory.

### Claim 9 (depends on 6)

The method of claim 6, wherein the quarantine module alters the first status level to a different third status level for the first physical data address in response to the first threshold of the quarantine strategy.

### Claim 10 (depends on 9)

The method of claim 9, wherein the third status level conducted concurrently with the second status level.

### Claim 11 (depends on 9)

The method of claim 9, wherein the third status level involves execution of at least one mitigation action to decrease an error rate for the first physical data address.

### Claim 12 (depends on 9)

The method of claim 9, wherein the quarantine module alters the second status level to a different fourth status level for the first physical data address in response to a third threshold of the quarantine strategy.

### Claim 13 (depends on 12)

The method of claim 12, wherein the fourth status level involves recalibrating a reference voltage for the first physical data address.

### Claim 14 (depends on 12)

The method of claim 12, wherein the fourth status level involves reassigning a type of data stored in the first physical data address.

### Claim 15 (depends on 12)

The method of claim 12, wherein the fourth status level involves generating and executing a growth strategy with the quarantine module, the growth strategy involves reconfiguring at least the outercode of data stored in the first physical data address.

### Claim 16 (depends on 12)

The method of claim 12, wherein the quarantine module alters the fourth status level to the first status level in response to a decrease in errors below the first threshold.

### Claim 17

A method comprising:
connecting a non-volatile memory to a quarantine module;
generating a quarantine strategy in response to a pending data access request to the non-volatile memory, the quarantine strategy proactively prescribing a plurality of status levels for physical data addresses of the non-volatile memory;
predicting an expense of a volume of system resources with the quarantine module;
comparing the predicted volume of system resources to a first threshold of the quarantine strategy with the quarantine module; and
altering a first status level of the plurality of status levels for a first physical data address of the non-volatile memory, as directed by the quarantine strategy, in response to the comparison of the expense of the volume of system resources to the first threshold.

### Claim 18 (depends on 17)

The method of claim 17, wherein the volume of system resources is a percentage of processing capability for the non-volatile memory.

### Claim 19 (depends on 17)

The method of claim 17, wherein the expense of volume of system resources is predicted from a combination of error rate and pending data access requests for the non-volatile memory.

### Claim 20 (depends on 17)

The method of claim 17, wherein the first status level decreases system resources used to track errors in the non-volatile memory.