# US 2022/0044651 A1 · Systems and methods for low power common electrode voltage generation for displays > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2022/0044651 A1 - Document ID: US20220044651A1 - Status: Published application - Kind: A1 - Application number: 17/413,621 - Filed: 2020-07-01 - Published: 2022-02-10 - Earliest claimed: 2019-07-01 - Assignees: Snap Inc. - Applicants: Compound Photonics U.S. Corporation - Inventors: Stewart S. Taylor - Web page: https://patentgrep.com/patent/US20220044651A1 ## CPC - G09G 3/3655: {Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors} - G09G 3/3696: {Generation of voltages supplied to electrode drivers} - G09G 2310/0291: Details of output amplifiers or buffers arranged for use in a driving circuit - G09G 2310/08: Details of timing specific for flat panels, other than clock recovery - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract A system, circuit, and method for implementing a low power common electrode voltage for a display (e.g., LCoS display) having transistors with low to moderate breakdown voltages may include a first and a second low voltage amplifier, wherein the first amplifier generates a pixel voltage and the second amplifier generates a predetermined voltage. The circuit may include a common electrode circuit coupled to the first and second amplifier to generate a common electrode voltage. Particularly, the circuit may include a control circuit coupled to the common electrode circuit, wherein, during a first phase, the control circuit selectively controls the common electrode circuit to generate a low common electrode voltage based upon a negative value of the predetermined voltage. Further, during a second phase, the control circuit selectively controls the common electrode circuit to generate a high common electrode voltage based upon the sum of the predetermined voltage and the pixel voltage. ## Claims ### Claim 1 A display system for displaying an image comprising: a display panel having a plurality of pixels, each of the plurality of pixels having a pixel electrode voltage (VPEV), and a common electrode voltage (VCOM); and a digital drive device coupled to the display panel comprising: a bit plane memory for providing the VPEV to each of the plurality of pixels; a common electrode circuit coupled to the display panel for providing the VCOM; and at least one first amplifier coupled to the display panel configured to generate a maximum pixel voltage (VPIX+) and a minimum pixel voltage (VPIX−); wherein the VPEV switches from VPIX+ to VPIX− according to a voltage received by at least one of the plurality of pixels from the bit plane memory, wherein the common electrode circuit further comprises at least one second amplifier configured to generate a predetermined voltage VDAC_COM, and wherein a value of VCOM switches between i) VPIX− minus VDAC_COM, and ii) VPIX+ plus VDAC_COM. ### Claim 2 (depends on 1) The display system of claim 1, wherein VPIX+ has a value in the range of 1.2V-4V, and VPIX− has a value in the range of 0V to −2.8V. ### Claim 3 (depends on 1) The display system of claim 1, wherein VDAC_COM has a value in the range of approximately 0-2V. ### Claim 4 (depends on 1) The display system of claim 1, wherein the common electrode voltage VCOM maintains DC voltage balance across the display panel. ### Claim 5 (depends on 1) The display system of claim 1, wherein the display panel is a liquid crystal display panel. ### Claim 6 (depends on 1) The display system of claim 1, further comprising a control circuit coupled to the common electrode circuit for supplying a clocking output CS to the common electrode circuit. ### Claim 7 (depends on 6) The display system of claim 6, wherein the common electrode circuit further comprises a plurality of switches that receive the clocking output CS. ### Claim 8 (depends on 7) The system of claim 7, wherein at least one of the plurality of switches includes a plurality of MOSFET transistors. ### Claim 9 (depends on 1) The display system of claim 1, wherein the common electrode circuit is located on a separate integrated circuit chip from the display panel. ### Claim 10 (depends on 1) The display system of claim 1, wherein the common electrode circuit is integrated into the same integrated circuit chip as the display panel. ### Claim 11 (depends on 1) The display system of claim 1, wherein VPIX− is zero, and a value of VCOM switches between less than zero and greater than VPIX+. ### Claim 12 A method of generating a common electrode drive voltage VCOM for a display panel having a plurality of pixels with a pixel voltage VPIX, the method comprising the steps of: coupling a common electrode circuit having at least one first capacitor and at least one second capacitor to the display panel; selectively controlling the common electrode circuit with the control circuit, during a first phase, to generate a low value of VCOM based upon a negative value of a predetermined voltage VDAC_COM; and selectively controlling the common electrode circuit using the control circuit during a second phase, to generate a high value of VCOM; coupling at least one first amplifier to the display panel configured to generate a maximum pixel voltage (VPIX+) and a minimum pixel voltage (VPIX−); wherein a value of VCOM switches between i) VPIX− minus VDAC_COM; and ii) VPIX+ plus VDAC_COM. ### Claim 13 (depends on 12) The method of claim 12, further comprising the step of: charging the at least one first capacitor and the at least one second capacitor within the common electrode circuit to the predetermined voltage VDAC_COM. ### Claim 14 (depends on 12) The method of claim 12, further comprising the step of coupling at least one second amplifier to the common electrode circuit configured to generate the predetermined voltage VDAC_COM. ### Claim 15 (depends on 12) The method of claim 12, wherein VPIX+ has a value in the range of 1.2-4V, and VPIX− has a value in the range of OV to −2.8V. ### Claim 16 (depends on 14) The method of claim 14, wherein VDAC_COM has a value in the range of 0-2V. ### Claim 17 (depends on 12) The method of claim 12, a value of VCOM maintains DC voltage balance across the display panel. ### Claim 18 (depends on 1) The method of claim 1, wherein the display system is an LCoS display system.