# US 2022/0044637 A1 · Display device

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- Number: US 2022/0044637 A1
- Document ID: US20220044637A1
- Status: Published application
- Kind: A1
- Application number: 17/509,363
- Filed: 2021-10-25
- Published: 2022-02-10
- Earliest claimed: 2017-02-01
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Jun Won CHOI; Jun Yong AN; Yun Kyeong IN; Won Mi HWANG
- Web page: https://patentgrep.com/patent/US20220044637A1

## CPC

- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element
- G09G 3/3291: in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/0251: Precharge or discharge of pixel before applying new pixel voltage
- G09G 2310/0262: The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
- G09G 2310/0297: Special arrangements with multiplexing or demultiplexing of display data in the drivers for data electrodes, in a pre-processing circuitry delivering display data to said drivers or in the matrix panel, e.g. multiplexing plural data signals to one D/A converter or demultiplexing the D/A converter output to multiple columns
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 59/805: {Electrodes}
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES

## Abstract

A display device includes: a plurality of pixels substantially in a matrix form including a plurality of pixel columns in a first direction and a plurality of pixel rows in a second direction intersecting the first direction; a plurality of data lines connected to the pixel columns, respectively; a plurality of scan lines extending in the second direction; and a power line which supplies a driving power voltage to the pixels. Each of the data lines includes a first sub-data line disposed at a side of a corresponding pixel column, and a second sub-data line disposed at an opposite side of the corresponding pixel column, and each of the pixels includes a first transistor and a display element connected to the first transistor, where the power line overlaps with at least a portion of the first transistor.

## Claims

### Claim 1

A display device comprising:
a plurality of pixels;
a plurality of data lines configured to supply data signals to the pixels, a plurality of scan lines configured to supply scan signals to the pixels; and
a power line configured to supply a driving power voltage to the pixels,
wherein each of the pixels comprises:
a display element;
a first transistor connected to a first node and configured to control an amount of current supplied to the display element, the first transistor including a gate electrode;
a second transistor connected between one of the data lines and the first node, the second transistor including a gate electrode connected to one of the scan lines; and
a third transistor connected to the gate electrode of the first transistor, the third transistor including a gate electrode connected to one of the scan lines,
wherein the power line overlaps with at least a portion of the gate electrode of the first transistor in a plan view, and
the power line is disposed on a different layer from the data lines.