# US 2022/0044636 A1 · Display substrate and display device

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- Number: US 2022/0044636 A1
- Document ID: US20220044636A1
- Status: Published application
- Kind: A1
- Application number: 17/506,041
- Filed: 2021-10-20
- Published: 2022-02-10
- Earliest claimed: 2021-10-20
- Assignees: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Applicants: Chengdu Boe Optoelectronics Technology Co., Ltd.; Boe Technology Group Co., Ltd.
- Inventors: Xin Mou; Yongfu Diao
- Web page: https://patentgrep.com/patent/US20220044636A1

## CPC

- G09G 3/3258: with pixel circuitry controlling the voltage across the light-emitting element
- G09G 3/2003: {Display of colours (specific for liquid crystal displays G09G3/3607)}
- G09G 3/3233: with pixel circuitry controlling the current through the light-emitting element
- H10K 59/1213: {the pixel elements being TFTs}
- H10K 59/1216: {the pixel elements being capacitors}
- H10K 59/126: Shielding, e.g. light-blocking means over the TFTs
- H10K 59/131: Interconnections, e.g. wiring lines or terminals
- H10K 71/00: Manufacture or treatment specially adapted for the organic devices covered by this subclass
- G06F 3/038: Control and interface arrangements therefor, e.g. drivers or device-embedded control circuitry
- G09G 3/30: using electroluminescent panels
- G09G 2300/0426: Layout of electrodes and connections
- G09G 2300/0443: with several sub-pixels for the same colour in a pixel, not specifically used to display gradations (G09G3/364 takes precedence)
- G09G 2300/0452: Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
- G09G 2300/0809: Several active elements per pixel in active matrix panels
- G09G 2300/0819: used for counteracting undesired variations, e.g. feedback or autozeroing
- G09G 2300/0842: forming a memory circuit, e.g. a dynamic memory with one capacitor
- G09G 2300/0861: with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
- G09G 2310/061: for resetting or blanking
- G09G 2320/0233: Improving the luminance or brightness uniformity across the screen
- G09G 2320/0238: Improving the black level
- G09G 2320/0242: Compensation of deficiencies in the appearance of colours
- G09G 2320/0666: for control of colour parameters, e.g. colour temperature
- G09G 2380/10: Automotive applications
- H10D 86/421: {having a particular composition, shape or crystalline structure of the active layer}
- H10D 86/60: wherein the TFTs are in active matrices
- H10K 59/1201: {Manufacture or treatment}
- H10K 59/35: comprising red-green-blue [RGB] subpixels
- H10K 59/352: {the areas of the RGB subpixels being different}
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10K: ORGANIC ELECTRIC SOLID-STATE DEVICES
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate, a sub-pixel includes an organic light emitting element and a pixel circuit, the organic light emitting element includes a first electrode, a light emitting layer and a second electrode which are stacked, the second electrode is electrically connected to the pixel circuit. The display substrate further includes an active semiconductor layer, a first conductive layer, a second conductive layer, a source-drain metal layer, and a third conductive layer, the source-drain metal layer includes a first power signal line, and the third conductive layer includes a second power signal line; the display substrate further includes reset power signal lines, the reset power signal lines include a first reset power signal line and a second reset power signal line which are electrically connected to the pixel circuit.

## Claims

### Claim 1

A display substrate, comprising:
a base substrate and a plurality of sub-pixels arranged on the base substrate, wherein at least part of the plurality of sub-pixels comprise an organic light emitting element and a pixel circuit for driving the organic light emitting element to emit light, the organic light emitting element comprises a first electrode, a light emitting layer and a second electrode which are stacked, the second electrode of the organic light emitting element is located between the light emitting layer and the base substrate, the second electrode of the organic light emitting element is electrically connected to the pixel circuit, the pixel circuit comprises a plurality of transistors, the plurality of sub-pixels are arranged along a first direction or a second direction, and the first direction is intersected with the second direction;
an active semiconductor layer, comprising channels, source regions and drain regions of the plurality of transistors;
a first conductive layer, located on a side of the active semiconductor layer away from the base substrate;
a second conductive layer, located on a side of the first conductive layer away from the base substrate;
a source-drain metal layer, located on a side of the second conductive layer away from the base substrate; and
a third conductive layer, located on a side of the source-drain metal layer away from the base substrate,
wherein the source-drain metal layer comprises a first power signal line, and the third conductive layer comprises a second power signal line;
the display substrate further comprises reset power signal lines, the reset power signal lines comprise a first reset power signal line and a second reset power signal line;
the first reset power signal line and the second reset power signal line are electrically connected to the pixel circuit and configured to provide a reset signal; and the first power signal line and the second power signal line are electrically connected to the pixel circuit.

### Claim 2 (depends on 1)

The display substrate according to claim 1, wherein the display substrate further comprises data lines, a data line is electrically connected to the pixel circuit to provide a data signal; at least one pixel circuit comprises a driving transistor, a first light emitting control transistor, a second light emitting control transistor and a first connection portion, the first connection portion is located in the source-drain metal layer, a first electrode of the first light emitting control transistor is electrically connected to the first power signal line through a first via hole, a second electrode of the first light emitting control transistor is electrically connected to a first electrode of the driving transistor, a first electrode of the second light emitting control transistor is electrically connected to a second electrode of the driving transistor, and a second electrode of the second light emitting control transistor is electrically connected to the first connection portion through a second via;
a first straight line extending along the first direction passes through at least one first via hole and at least one second via.

### Claim 3 (depends on 2)

The display substrate according to claim 2, wherein the pixel circuit further comprises a second connection portion, the second connection portion is arranged in the same layer as the second power signal line, the second connection portion is electrically connected to the first connection portion through a third via hole, and the second power signal line is electrically connected to the first power signal line through a fourth via;
a second straight line extending along the first direction passes through at least one fourth via hole and at least one third via.

### Claim 4 (depends on 3)

The display substrate according to claim 3, wherein the plurality of sub-pixels comprise a plurality of first color sub-pixels, a plurality of second color sub-pixels and a plurality of third color sub-pixels, and in a direction perpendicular to the base substrate, the second electrode of the organic light emitting element of at least one of the plurality of third color sub-pixels overlaps with at least two data lines.

### Claim 5 (depends on 4)

The display substrate according to claim 4, wherein the second electrode of the organic light emitting element of the at least part of the plurality of sub-pixels comprises a main electrode and a connection electrode, the connection electrode is electrically connected to the second light emitting control transistor, the connection electrode of at least one of the plurality of second color sub-pixels and the connection electrode of at least one of the plurality of first color sub-pixels extend along the second direction, and the connection electrode of at least one of the plurality of third color sub-pixels extends along the first direction.

### Claim 6 (depends on 1)

The display substrate according to claim 1, wherein the first reset power signal line extends along the first direction, and the second reset power signal line extends along the second direction.

### Claim 7 (depends on 1)

The display substrate according to claim 1, wherein the first reset power signal line is disposed in the second conductive layer, and the second reset power signal line is disposed in the source-drain metal layer.

### Claim 8 (depends on 5)

The display substrate according to claim 5, wherein the connection electrode of the at least part of the plurality of sub-pixels is electrically connected to the second connection portion through a fifth via hole, the first conductive layer further comprises a light emitting control signal line extending along the first direction, the light emitting control signal line is electrically connected to gate electrodes of the first light emitting control transistor and the second light emitting control transistor,
an orthographic projection of at least part of the second via hole of at least one sub-pixel on the base substrate is located at one side of an orthographic projection of the light emitting control signal line on the base substrate, and an orthographic projection of at least part of the fifth via hole on the base substrate is located at the other side of the orthographic projection of the light emitting control signal line on the base substrate.

### Claim 9 (depends on 8)

The display substrate according to claim 8, wherein, in at least one second color sub-pixel, the fifth via hole is closer to a center of the main electrode than the third via hole is; and in at least one first color sub-pixel, the fifth via hole is closer to a center of the main electrode than the third via hole is.

### Claim 10 (depends on 4)

The display substrate according to claim 4, wherein an orthographic projection of the second electrode of the organic light emitting element of the first color sub-pixel on a straight line extending along the first direction overlaps with orthographic projections of three first connection portions respectively located in three sub-pixels, and the three sub-pixels comprise one first color sub-pixel, one second color sub-pixel and one third color sub-pixel.

### Claim 11 (depends on 4)

The display substrate according to claim 4, wherein an orthographic projection of the second electrode of the organic light emitting element of the first color sub-pixel on a straight line extending along the first direction overlaps with orthographic projections of three second connection portions respectively located in three sub-pixels, and the three sub-pixels comprise one first color sub-pixel, one second color sub-pixel and one third color sub-pixel.

### Claim 12 (depends on 4)

The display substrate according to claim 4, wherein, in at least one of the plurality of third color sub-pixels, the second electrode of the organic light emitting element does not overlap with a channel of the driving transistor which controls the organic light emitting element of the third color sub-pixel in the direction perpendicular to the base substrate.

### Claim 13 (depends on 4)

The display substrate according to claim 4, wherein, in at least one of the plurality of first color sub-pixels, the second electrode of the organic light emitting element overlaps with a channel of the driving transistor which controls the organic light emitting element of the first color sub-pixel in the direction perpendicular to the base substrate.

### Claim 14 (depends on 4)

The display substrate according to claim 4, wherein, in at least one sub-pixel, the second electrode of the organic light emitting element exposes the third via.

### Claim 15 (depends on 14)

The display substrate according to claim 14, wherein, in each of the plurality of first color sub-pixels, an orthographic projection of the second electrode of the organic light emitting element on the base substrate does not overlap with an orthographic projection of the third via hole on the base substrate; in each of the plurality of second color sub-pixels, an orthographic projection of the second electrode of the organic light emitting element on the base substrate does not overlap with an orthographic projection of the third via hole on the base substrate; and in each of the plurality of third color sub-pixels, an orthographic projection of the second electrode of the organic light emitting element on the base substrate does not overlap with an orthographic projection of the third via hole on the base substrate.

### Claim 16 (depends on 4)

The display substrate according to claim 4, wherein among at least one of the plurality of first color sub-pixels, at least one of the plurality of second color sub-pixels and at least one of the plurality of third color sub-pixels, the pixel circuit further comprises a storage capacitor, a first electrode of the storage capacitor is located in the second conductive layer, a second electrode of the storage capacitor is located in the first conductive layer, and the first electrode of the storage capacitor and the second electrode of the storage capacitor overlap in the direction perpendicular to the base substrate and have an overlapping area;
the overlapping area in the first color sub-pixel is the greatest among the at least one of the plurality of first color sub-pixels, the at least one of the plurality of second color sub-pixels and the at least one of the plurality of third color sub-pixels.

### Claim 17 (depends on 1)

The display substrate according to claim 1, wherein at least one first reset power signal line is electrically connected to at least one second reset power signal line, the first reset power signal line is electrically connected to the second reset power signal line through a sixth via.

### Claim 18 (depends on 16)

The display substrate according to claim 16, wherein the second conductive layer further comprises a signal pattern, the signal pattern is located between the first reset power signal line and the first electrode of the storage capacitor in the second direction, and the signal pattern is configured to access the reset signal.

### Claim 19 (depends on 18)

The display substrate according to claim 18, wherein the first conductive layer further comprises a scanning signal line extending along the first direction, the pixel circuit of the at least part of the plurality of sub-pixels further comprises a data writing transistor, a first electrode of the data writing transistor is electrically connected to the first electrode of the driving transistor, a second electrode of the data writing transistor is configured to be electrically connected to the data line to receive a data signal, and a gate electrode of the data writing transistor is configured to be electrically connected to the scanning signal line to receive a scan signal;
the first reset power signal line extends along the first direction, and in the second direction, an orthographic projection of the signal pattern on the base substrate is located between an orthographic projection of the scanning signal line on the base substrate and an orthographic projection of the first reset power signal line on the base substrate.

### Claim 20 (depends on 1)

A display device, comprising the display substrate according to claim 1.