# US 2022/0044609 A1 · Data transmission circuit and display apparatus including the same

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- Number: US 2022/0044609 A1
- Document ID: US20220044609A1
- Status: Published application
- Kind: A1
- Application number: 17/388,808
- Filed: 2021-07-29
- Published: 2022-02-10
- Earliest claimed: 2020-08-04
- Assignees: Samsung Display Co., Ltd.
- Applicants: Samsung Display Co., Ltd.
- Inventors: Kihyun PYUN; Heesook PARK
- Web page: https://patentgrep.com/patent/US20220044609A1

## CPC

- G09G 3/20: for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix {no fixed position being assigned to or needed to be assigned to the individual characters or partial characters}
- G09G 3/2096: {Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167)}
- G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)}
- G09G 2310/0267: Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
- G09G 2310/0275: Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
- G09G 2330/028: Generation of voltages supplied to electrode drivers in a matrix display other than LCD
- G09G 2370/04: Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
- G09G 2370/08: Details of image data interface between the display device controller and the data line driver circuit
- G09G 2370/10: Use of a protocol of communication by packets in interfaces along the display data pipeline
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)

## Abstract

A data transmission circuit includes a transmitter configured to transmit a data signal, a receiver configured to receive the data signal, a first transmission line connected between the transmitter and the receiver, and a second transmission line connected between the transmitter and the receiver. The data signal includes a line start signal, and a configuration signal. The data signal further includes at least one of an inverted line start signal which is an inverted version of the line start signal or an inverted configuration signal which is an inverted version of the configuration signal.

## Claims

### Claim 1

A data transmission circuit comprising:
a transmitter configured to transmit a data signal;
a receiver configured to receive the data signal;
a first transmission line connected between the transmitter and the receiver; and
a second transmission line connected between the transmitter and the receiver,
wherein the data signal includes a line start signal, and a configuration signal, and
wherein the data signal further includes at least one of an inverted line start signal which is an inverted version of the line start signal or an inverted configuration signal which is an inverted version of the configuration signal.

### Claim 2 (depends on 1)

The data transmission circuit of claim 1, wherein the data signal sequentially includes the line start signal, the configuration signal, a first inversion signal, the inverted line start signal, the inverted configuration signal, and a second inversion signal.

### Claim 3 (depends on 2)

The data transmission circuit of claim 2,
wherein the transmitter is configured to further transmit an inversion detection signal to the receiver, and
wherein the inversion detection signal is changed from a first level to a second level overlapping with the first inversion signal and changed from the second level to the first level overlapping with the second inversion signal.

### Claim 4 (depends on 2)

The data transmission circuit of claim 2,
wherein the data signal further includes a pixel signal and a horizontal blank signal,
wherein the first inversion signal and the second inversion signal include a signal pattern substantially the same as the horizontal blank signal.

### Claim 5 (depends on 1)

The data transmission circuit of claim 1, wherein the data signal sequentially includes the line start signal, a first inversion signal, the inverted line start signal, a second inversion signal, the configuration signal, a third inversion signal, the inverted configuration signal, and a fourth inversion signal.

### Claim 6 (depends on 5)

The data transmission circuit of claim 5,
wherein the transmitter is configured to further transmit an inversion detection signal to the receiver, and
wherein the inversion detection signal is changed from a first level to a second level overlapping with the first inversion signal, changed from the second level to the first level overlapping with the second inversion signal, changed from the first level to the second level overlapping with the third inversion signal, and changed from the second level to the first level overlapping with the fourth inversion signal.

### Claim 7 (depends on 5)

The data transmission circuit of claim 5,
wherein the data signal further includes a pixel signal and a horizontal blank signal,
wherein the first inversion signal, the second inversion signal, the third inversion signal, and the fourth inversion signal include a signal pattern substantially the same as the horizontal blank signal.

### Claim 8 (depends on 1)

The data transmission circuit of claim 1, wherein the data signal includes one of the inverted line start signal or the inverted configuration signal according to data patterns of the line start signal or the configuration signal, respectively.

### Claim 9 (depends on 8)

The data transmission circuit of claim 8, wherein when a ratio between a high level and a low level of the line start signal is not 1:1, the data signal includes the inverted line start signal.

### Claim 10 (depends on 8)

The data transmission circuit of claim 8, wherein when a ratio between a high level and a low level of the configuration signal is not 1:1, the data signal includes the inverted configuration signal.

### Claim 11 (depends on 1)

The data transmission circuit of claim 1,
wherein the configuration signal includes a first configuration signal and a second configuration signal,
wherein the inverted configuration signal includes a first inverted configuration signal which is an inverted version of the first configuration signal, and a second inverted configuration signal which is an inverted version of the second configuration signal, and
wherein the data signal sequentially includes the line start signal, a first inversion signal, the inverted line start signal, a second inversion signal, the first configuration signal, a third inversion signal, the first inverted configuration signal, a fourth inversion signal, the second configuration signal, a fifth inversion signal, the second inverted configuration signal, and a sixth inversion signal.

### Claim 12 (depends on 11)

The data transmission circuit of claim 11,
wherein the transmitter is configured to further transmit an inversion detection signal to the receiver, and
wherein the inversion detection signal is changed from a first level to a second level overlapping with the first inversion signal, changed from the second level to the first level overlapping with the second inversion signal, changed from the first level to the second level overlapping with the third inversion signal, changed from the second level to the first level overlapping with the fourth inversion signal, changed from the first level to the second level overlapping with the fifth inversion signal, and changed from the second level to the first level overlapping with the sixth inversion signal.

### Claim 13 (depends on 11)

The data transmission circuit of claim 11,
wherein the data signal further includes a pixel signal and a horizontal blank signal,
wherein the first inversion signal, the second inversion signal, the third inversion signal, the fourth inversion signal, the fifth inversion signal and the sixth inversion signal include a signal pattern substantially the same as the horizontal blank signal.

### Claim 14 (depends on 1)

The data transmission circuit of claim 1,
wherein the configuration signal includes a first configuration signal and a second configuration signal, and
wherein the data signal includes one of a first inverted configuration signal which is an inverted version of the first configuration signal or a second inverted configuration signal which is an inverted version of the second configuration signal according to data patterns of the first configuration signal or the second configuration signal, respectively.

### Claim 15 (depends on 14)

The data transmission circuit of claim 14, wherein when a ratio between a high level and a low level of the first configuration signal is not 1:1, the data signal sequentially includes the line start signal, a first inversion signal, the inverted line start signal, a second inversion signal, the first configuration signal, a third inversion signal, the first inverted configuration signal, a fourth inversion signal, and the second configuration signal.

### Claim 16 (depends on 14)

The data transmission circuit of claim 14, wherein when a ratio between a high level and a low level of the second configuration signal is not 1:1, the data signal sequentially includes the line start signal, a first inversion signal, the inverted line start signal, a second inversion signal, the first configuration signal, the second configuration signal, a third inversion signal, the second inverted configuration signal, and a fourth inversion signal.

### Claim 17 (depends on 1)

The data transmission circuit of claim 1, further comprising:
a first capacitor disposed between the transmitter and the first transmission line;
a second capacitor disposed between the receiver and the first transmission line;
a third capacitor disposed between the transmitter and the second transmission line; and
a fourth capacitor disposed between the receiver and the second transmission line.

### Claim 18

A display apparatus comprising:
a display panel configured to display an image based on a data signal;
a driving controller configured to generate the data signal based on input image data;
a data driver configured to convert the data signal into a data voltage and output the data voltage to the display panel; and
a data transmission circuit including a transmitter configured to transmit a signal, a receiver configured to receive the signal, a first transmission line connected between the transmitter and the receiver, and a second transmission line connected between the transmitter and the receiver,
wherein the data signal includes a line start signal, a configuration signal, a pixel signal, and a horizontal blank signal, and
wherein the data signal further includes at least one of an inverted line start signal which is an inverted version of the line start signal or an inverted configuration signal which is an inverted version of the configuration signal.

### Claim 19 (depends on 18)

The display apparatus of claim 18, wherein the data signal sequentially includes the line start signal, the configuration signal, a first inversion signal, the inverted line start signal, the inverted configuration signal, and a second inversion signal.

### Claim 20 (depends on 19)

The display apparatus of claim 19,
wherein the transmitter is configured to further transmit an inversion detection signal to the receiver, and
wherein the inversion detection signal is changed from a first level to a second level overlapping with the first inversion signal, and changed from the second level to the first level overlapping with the second inversion signal.
