# US 2022/0044103 A1 · Matrix-vector multiplication using sot-based non-volatile memory cells

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- Number: US 2022/0044103 A1
- Document ID: US20220044103A1
- Status: Published application
- Kind: A1
- Application number: 17/172,155
- Filed: 2021-02-10
- Published: 2022-02-10
- Earliest claimed: 2020-08-10
- Assignees: Western Digital Technologies, Inc.
- Applicants: Western Digital Technologies, Inc.
- Inventors: Thao A. Nguyen; Michael Ho; Zhigang Bai; Xiaoyong Liu; Zhanjie Li; Yongchul Ahn; Hongquan Jiang; Quang Le
- Web page: https://patentgrep.com/patent/US20220044103A1

## CPC

- G06N 3/063: using electronic means
- G06F 17/16: Matrix or vector computation {, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization (matrix transposition G06F7/78)}
- G06N 3/0495: Quantised networks; Sparse networks; Compressed networks
- G06N 3/0499: Feedforward networks
- G06N 3/08: Learning methods
- G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell}
- G11C 11/1675: {Writing or programming circuits or methods}
- G11C 11/18: using Hall-effect devices
- G11C 11/54: using elements simulating biological cells, e.g. neuron
- H10B 61/00: Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N 50/10: Magnetoresistive devices
- H10N 50/85: Materials of the active region
- H10N 52/00: Hall-effect devices (integrated devices or assemblies of multiple devices H10N59/00)
- H10N 52/80: Constructional details
- G06N: COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR

## Abstract

An apparatus is provided that includes an array including n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes including a spin orbit torque MRAM non-volatile memory cell configured to store a corresponding weight of an n×m array of weights each having a first weight value or a second weight value, and a control circuit configured to apply n input voltages each having a first input value or a second input value to corresponding n first conductive lines, the n input voltages corresponding to an n-element input vector. The spin orbit torque MRAM non-volatile memory cells are configured to generate m output currents at the m second conductive lines upon application of the n input voltages. The m output currents corresponding to a result of multiplying the input vector by the n×m array of weights.

## Claims

### Claim 1

An apparatus comprising:
an array comprising n rows and m columns of nodes, each row of nodes coupled to one of n first conductive lines, each column of nodes coupled to one of m second conductive lines, each node of the n rows and m columns of nodes comprising a spin orbit torque MRAM non-volatile memory cell configured to store a corresponding weight of an n×m array of weights each having a first weight value or a second weight value; and
a control circuit configured to apply n input voltages each having a first input value or a second input value to corresponding n first conductive lines, the n input voltages corresponding to an n-element input vector,
wherein:
the spin orbit torque MRAM non-volatile memory cells are configured to generate m output currents at the m second conductive lines upon application of the n input voltages; and
the m output currents corresponding to a result of multiplying the input vector by the n×m array of weights.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises a first terminal coupled to one of the n first conductive lines, and a second terminal coupled to one of the m second conductive lines.

### Claim 3 (depends on 2)

The apparatus of claim 2, wherein each spin orbit torque MRAM non-volatile memory cell further comprises a third terminal coupled to one of n third conductive lines.

### Claim 4 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises:
a Spin Hall Effect layer; and
a magnetic tunnel junction comprising a pinned layer and a free layer that each have a perpendicular direction of magnetization, wherein the magnetic tunnel junction comprises a substantially cylindrical shape.

### Claim 5 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises:
a Spin Hall Effect layer; and
a magnetic tunnel junction comprising a pinned layer and a free layer that each have an in-plane direction of magnetization,
wherein the magnetic tunnel junction comprises a substantially ellipsoidal shape, and the pinned layer and a free layer each have an easy axis perpendicular to a current flow in the Spin Hall Effect layer.

### Claim 6 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises:
a Spin Hall Effect layer; and
a magnetic tunnel junction comprising a pinned layer and a free layer that each have an in-plane direction of magnetization,
wherein the magnetic tunnel junction comprises a substantially ellipsoidal shape, and the pinned layer and a free layer each have an easy axis that is at an angle off-perpendicular to a current flow in the Spin Hall Effect layer.

### Claim 7 (depends on 1)

The apparatus of claim 1, wherein:
each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer and a magnetic tunnel junction comprising a free layer;
each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by:
applying a first electrical current pulse through the Spin Hall Effect layer to cause a direction of magnetization of the free layer to oscillate; and
applying a second electrical pulse through the magnetic tunnel junction and the Spin Hall Effect layer to switch the direction of magnetization of the free layer.

### Claim 8 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer comprising any of a heavy metal and a topological insulator.

### Claim 9 (depends on 1)

The apparatus of claim 1, wherein each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer comprising bismuth antimony with (012) orientation.

### Claim 10 (depends on 1)

The apparatus of claim 1, wherein:
the n input voltages correspond to elements of an input vector; and
each spin orbit torque MRAM non-volatile memory cell conducts a memory cell current that corresponds to a result of multiplying one of the elements of the input vector by the corresponding weight stored in the spin orbit torque MRAM non-volatile memory cell.

### Claim 11 (depends on 1)

The apparatus of claim 1, wherein:
the n input voltages correspond to elements of an input vector; and
each of the m output currents corresponds to a sum of products of the input vector with corresponding weights in a column of the n×m array of weights.

### Claim 12

An apparatus comprising:
a cross-point memory array comprising a plurality of spin orbit torque MRAM non-volatile memory cells configured to store synaptic weights of an artificial neural network;
a plurality of word lines coupled to the spin orbit torque MRAM non-volatile memory cells; and
a plurality of bit lines coupled to the spin orbit torque MRAM non-volatile memory cells,
wherein in response to a plurality of input voltages coupled to the plurality of word lines, the spin orbit torque MRAM non-volatile memory cells generate output currents at the plurality of bit lines representing outputs of the artificial neural network.

### Claim 13 (depends on 12)

The apparatus of claim 12, wherein each spin orbit torque MRAM non-volatile memory cell comprises a first terminal coupled to one of the word lines, and a second terminal coupled to one of the bit lines.

### Claim 14 (depends on 12)

The apparatus of claim 12, wherein:
each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer and a magnetic tunnel junction comprising a free layer;
each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by:
applying a first electrical current pulse through the Spin Hall Effect layer to cause a direction of magnetization of the free layer to oscillate; and
applying a second electrical pulse through the magnetic tunnel junction and the Spin Hall Effect layer to switch the direction of magnetization of the free layer.

### Claim 15 (depends on 12)

The apparatus of claim 12, wherein:
each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer and a magnetic tunnel junction comprising a free layer;
each spin orbit torque MRAM non-volatile memory cell is configured to be programmed by applying an electrical current pulse through the Spin Hall Effect layer to switch a direction of magnetization of the free layer.

### Claim 16 (depends on 12)

The apparatus of claim 12, wherein each of the plurality of bit lines is input to an activation function of the artificial neural network.

### Claim 17 (depends on 12)

The apparatus of claim 12, wherein each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer comprising any of a heavy metal and a topological insulator.

### Claim 18 (depends on 12)

The apparatus of claim 12, wherein each spin orbit torque MRAM non-volatile memory cell comprises bismuth antimony with (012) orientation.

### Claim 19

A method comprising:
programming each of a plurality of spin orbit torque MRAM non-volatile memory cells with a corresponding weight of an n×m array of weights each having a first weight value or a second weight value;
generating n input voltages corresponding to an n-element input vector; and
applying the n input voltages to the plurality of spin orbit torque MRAM non-volatile memory cells to generate m output currents that represent a result of multiplying the n-element input vector by the n×m array of weights.

### Claim 20 (depends on 19)

The method of claim 19, wherein each spin orbit torque MRAM non-volatile memory cell comprises a Spin Hall Effect layer comprising any of a heavy metal and a topological insulator.