# US 2022/0037346 A1 · Assemblies Comprising Memory Cells and Select Gates; and Methods of Forming Assemblies

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- Number: US 2022/0037346 A1
- Document ID: US20220037346A1
- Status: Published application
- Kind: A1
- Application number: 17/499,218
- Filed: 2021-10-12
- Published: 2022-02-03
- Earliest claimed: 2017-12-22
- Assignees: Micron Technology, Inc.
- Applicants: Micron Technology, Inc.
- Inventors: Ugo Russo
- Web page: https://patentgrep.com/patent/US20220037346A1

## CPC

- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 7/1096: {Write circuits, e.g. I/O line write drivers}
- G11C 8/12: Group selection circuits, e.g. for memory block selection, chip selection, array selection
- G11C 16/08: Address circuits; Decoders; Word-line control circuits
- G11C 19/32: using super-conductive elements
- H10B 41/35: with a cell select transistor, e.g. NAND
- H10B 43/27: the channels comprising vertical portions, e.g. U-shaped channels
- G11C 11/5621: {using charge storage in a floating gate}
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

Some embodiments include an assembly having a stack of alternating dielectric levels and conductive levels. Channel material pillars extend through the stack. Some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. Memory cells are along the channel material pillars. An insulative level is over the stack. A select gate configuration is over the insulative level. The select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. The first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. The first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another. Some embodiments include methods of forming assemblies.

## Claims

### Claim at position 1

1-30. (canceled)

### Claim 31

An assembly, comprising:
a stack comprising alternating dielectric levels and conductive levels;
channel material pillars extending through the stack; some of the channel material pillars being associated with a first sub-block and others of the channel material pillars being associated with a second sub-block;
memory cells along the channel material pillars;
an insulative level over the stack;
a select gate configuration over the insulative level; the select gate configuration including a first conductive gate structure associated with the first sub-block and a second conductive gate structure associated with the second sub-block, the first and second conductive gate structures being laterally spaced from one another by an intervening insulative region along a cross-section; the first conductive gate structure being along a first side of the intervening insulative region, and the second conductive gate structure being along a second side of the intervening insulative region; the second side being in opposing relation to the first side along the cross-section; and
wherein the first and second conductive gate structures have vertically-spaced conductive regions separated from one another by dielectric regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another.

### Claim 32 (depends on 31)

The assembly of claim 31 wherein the vertically-extending conductive structures comprise metal,

### Claim 33 (depends on 31)

The assembly of claim 31 wherein the vertically-extending conductive structures comprise tungsten.

### Claim 34 (depends on 31)

The assembly of claim 31 wherein the memory cells are NAND memory cells.

### Claim 35 (depends on 31)

The assembly of claim 31 wherein the intervening insulative region includes a bottom portion which penetrates into the insulative level.

### Claim 36 (depends on 31)

The assembly of claim 31 wherein the memory cells comprise charge-blocking material, and wherein the dielectric regions comprise a same composition as the charge-blocking material.