# US 2022/0035644 A1 · Directed interrupt virtualization with fallback > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2022/0035644 A1 - Document ID: US20220035644A1 - Status: Published application - Kind: A1 - Application number: 17/506,368 - Filed: 2021-10-20 - Published: 2022-02-03 - Earliest claimed: 2019-02-14 - Assignees: International Business Machines Corporation - Applicants: International Business Machines Corporation - Inventors: Christoph Raisch; Marco Kraemer; Donald William Schmidt; Bernd Nerz; Peter Dana Driever - Web page: https://patentgrep.com/patent/US20220035644A1 ## CPC - G06F 9/45545: {Guest-host, i.e. hypervisor is an application program itself, e.g. VirtualBox} - G06F 9/4812: {by interrupt, e.g. masked} - G06F 9/4881: {Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues} - G06F 9/5027: {the resource being a machine, e.g. CPUs, Servers, Terminals} - G06F 9/542: {Event management; Broadcasting; Multicasting; Notifications} - G06F 13/24: using interrupt (G06F13/32 takes precedence) - G06F 9/45533: {Hypervisors; Virtual machine monitors} - G06F 2009/45579: {I/O management, e.g. providing access to device drivers or storage} - G06F 2213/24: Interrupt - G06F 2213/2414: Routing of interrupt among interrupt handlers in processor system or interrupt controller - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A processor receives an interrupt signal. The interrupt signal is received with an interrupt target ID identifying a target processor for handling the interrupt signal. The processor is a target of the interrupt signal directly. A check is made as to whether the processor is the target processor identified by the interrupt target ID. The checking includes performing a comparison of the interrupt target ID with a current interrupt target ID assigned to the processor. Based on the checking being successful, the interrupt signal is accepted for handling by the processor. ## Claims ### Claim 1 A computer program product for facilitating processing within a computing environment, the computer program product comprising: one or more computer readable storage media and program instructions collectively stored on the one or more computer readable storage media to perform a method comprising: receiving, by a processor, an interrupt signal, the interrupt signal being received with an interrupt target ID identifying a target processor for handling the interrupt signal, the processor being a target of the interrupt signal directly; checking whether the processor is the target processor identified by the interrupt target ID, the checking comprising performing a comparison of the interrupt target ID with a current interrupt target ID assigned to the processor; and accepting, based on the checking being successful, the interrupt signal for handling by the processor. ### Claim 2 (depends on 1) The computer program product of claim 1, wherein the computing environment includes a plurality of processors assigned for usage by a guest operating system, the plurality of processors including the processor receiving the interrupt signal, and wherein the method further comprises broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system. ### Claim 3 (depends on 2) The computer program product of claim 2, wherein the receiving the interrupt signal further comprises receiving the interrupt signal with an interrupt subclass ID identifying an interrupt subclass to which the interrupt signal is assigned, and wherein the broadcasting is limited to the remaining processors assigned to the interrupt subclass ID. ### Claim 4 (depends on 1) The computer program product of claim 1, wherein the processor is assigned for usage by a guest operating system, and wherein the receiving the interrupt signal further comprises receiving the interrupt signal with a logical partition ID identifying a logical partition to which the guest operating system is assigned, and wherein the checking further comprises comparing the logical partition ID with a current logical partition ID assigned to the processor, wherein the accepting further comprises performing the accepting based on the checking being successful. ### Claim 5 (depends on 4) The computer program product of claim 4, wherein the computing environment includes a plurality of processors assigned for usage by the guest operating system, the plurality of processors including the processor receiving the interrupt signal, and wherein the method further comprises broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system. ### Claim 6 (depends on 5) The computer program product of claim 5, wherein the broadcasting is limited to the remaining processors of the plurality of processors assigned to the logical partition ID. ### Claim 7 (depends on 1) The computer program product of claim 1, wherein the receiving is performed based on a running indicator indicating that the target processor identified by the interrupt target ID is scheduled for usage by a guest operating system of the computing environment. ### Claim 8 (depends on 1) The computer program product of claim 1, wherein the receiving is performed based on an interrupt blocking indicator indicating that the target processor identified by the interrupt target ID is currently not blocked from receiving interrupt signals. ### Claim 9 (depends on 1) The computer program product of claim 1, wherein the receiving is performed based on a direct signaling indicator indicating that the target processor is to be addressed directly. ### Claim 10 (depends on 1) The computer program product of claim 1, wherein the receiving is performed based on a running indicator indicating that the target processor identified by the interrupt target ID is scheduled for usage by a guest operating system of the computing environment, based on an interrupt blocking indicator indicating that the target processor identified by the interrupt target ID is currently not blocked from receiving interrupt signals, and based on a direct signaling indicator indicating that the target processor is to be addressed directly, else a broadcast of the interrupt signal is performed to one or more other processors of the computing environment assigned for usage by the guest operating system. ### Claim 11 A computer system for facilitating processing within a computing environment, the computer system comprising: a memory; and at least one processor in communication with the memory, wherein the computer system is configured to perform a method, said method comprising: receiving, by a processor, an interrupt signal, the interrupt signal being received with an interrupt target ID identifying a target processor for handling the interrupt signal, the processor being a target of the interrupt signal directly; checking whether the processor is the target processor identified by the interrupt target ID, the checking comprising performing a comparison of the interrupt target ID with a current interrupt target ID assigned to the processor; and accepting, based on the checking being successful, the interrupt signal for handling by the processor. ### Claim 12 (depends on 11) The computer system of claim 11, wherein the computing environment includes a plurality of processors assigned for usage by a guest operating system, the plurality of processors including the processor receiving the interrupt signal, and wherein the method further comprises broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system. ### Claim 13 (depends on 12) The computer system of claim 12, wherein the receiving the interrupt signal further comprises receiving the interrupt signal with an interrupt subclass ID identifying an interrupt subclass to which the interrupt signal is assigned, and wherein the broadcasting is limited to the remaining processors assigned to the interrupt subclass ID. ### Claim 14 (depends on 11) The computer system of claim 11, wherein the processor is assigned for usage by a guest operating system, and wherein the receiving the interrupt signal further comprises receiving the interrupt signal with a logical partition ID identifying a logical partition to which the guest operating system is assigned, and wherein the checking further comprises comparing the logical partition ID with a current logical partition ID assigned to the processor, wherein the accepting further comprises performing the accepting based on the checking being successful. ### Claim 15 (depends on 14) The computer system of claim 14, wherein the computing environment includes a plurality of processors assigned for usage by the guest operating system, the plurality of processors including the processor receiving the interrupt signal, and wherein the method further comprises broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system, and wherein the broadcasting is limited to the remaining processors of the plurality of processors assigned to the logical partition ID. ### Claim 16 A computer-implemented method of facilitating processing within a computing environment, the computer-implemented method comprising: receiving, by a processor, an interrupt signal, the interrupt signal being received with an interrupt target ID identifying a target processor for handling the interrupt signal, the processor being a target of the interrupt signal directly; checking whether the processor is the target processor identified by the interrupt target ID, the checking comprising performing a comparison of the interrupt target ID with a current interrupt target ID assigned to the processor; and accepting, based on the checking being successful, the interrupt signal for handling by the processor. ### Claim 17 (depends on 16) The computer-implemented method of claim 16, wherein the computing environment includes a plurality of processors assigned for usage by a guest operating system, the plurality of processors including the processor receiving the interrupt signal, and further comprising broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system. ### Claim 18 (depends on 17) The computer-implemented method of claim 17, wherein the receiving the interrupt signal further comprises receiving the interrupt signal with an interrupt subclass ID identifying an interrupt subclass to which the interrupt signal is assigned, and wherein the broadcasting is limited to the remaining processors assigned to the interrupt subclass ID. ### Claim 19 (depends on 16) The computer-implemented method of claim 16, wherein the processor is assigned for usage by a guest operating system, and wherein the receiving the interrupt signal further comprises receiving the interrupt signal with a logical partition ID identifying a logical partition to which the guest operating system is assigned, and wherein the checking further comprises comparing the logical partition ID with a current logical partition ID assigned to the processor, wherein the accepting further comprises performing the accepting based on the checking being successful. ### Claim 20 (depends on 19) The computer-implemented method of claim 19, wherein the computing environment includes a plurality of processors assigned for usage by the guest operating system, the plurality of processors including the processor receiving the interrupt signal, and further comprising broadcasting, based on the checking being unsuccessful, the interrupt signal to remaining processors of the plurality of processors for handling of the interrupt signal by the guest operating system, and wherein the broadcasting is limited to the remaining processors of the plurality of processors assigned to the logical partition ID.