Patterned Silicide Structures and Methods of Manufacture

An Integrated Circuit (IC) comprising:

• a plurality of first silicide regions disposed in a substrate;
• a plurality of trenches disposed between the plurality of first silicide regions and extending into the substrate below the plurality of first silicide regions;
• a plurality of first dielectric regions disposed in the plurality of trenches and over the plurality of first silicide regions;
• a plurality of first conductive regions disposed above the plurality of first dielectric regions;
• a plurality of second dielectric regions disposed above the plurality of first conductive regions;
• a plurality of semiconductor materials with various degree of crystallinity regions disposed in holes extending through the plurality of second dielectric regions, the plurality of conductive regions and the plurality of first dielectric regions and down to the plurality of first silicide regions, wherein the plurality of semiconductor materials with various degree of crystallinity regions are coupled to corresponding first silicide regions;
• a third dielectric region disposed between the first conductive regions and the plurality semiconductor materials with various degree of crystallinity regions;
• and
• a plurality of Magnetic Tunnel Junction (MTJ) cell pillars disposed on corresponding ones of the plurality of semiconductor materials with various degree of crystallinity regions.