Semiconductor device, and method for manufacturing semiconductor device
AssigneeSony Semiconductor Solutions Corporation
InventorsYuki YANAGISAWA, Takashi FUTATSUKI
Life of this patent
Estimating the term…
Abstract
There is provided a semiconductor device including: a semiconductor substrate; a gate insulating film provided on the semiconductor substrate; a gate electrode layer that is provided on the gate insulating film and contains impurity ions; and source or drain regions that are provided on the semiconductor substrate on both sides of the gate electrode layer and contain conductive impurities, in which a concentration of the impurity ions in the gate electrode layer is higher than concentrations of the conductive impurities in the source or drain regions.
Claims19
A semiconductor device comprising:
- a semiconductor substrate;
- a gate insulating film provided on the semiconductor substrate;
- a gate electrode layer that is provided on the gate insulating film and contains impurity ions;
- and
- source or drain regions that are provided on the semiconductor substrate on both sides of the gate electrode layer and contain conductive impurities, wherein
- a concentration of the impurity ions in the gate electrode layer is higher than a concentration of the conductive impurities in the source or drain regions.
A semiconductor device comprising:
- a semiconductor substrate;
- a gate insulating film provided on the semiconductor substrate;
- a gate electrode layer that is provided on the gate insulating film and contains impurity ions;
- source or drain regions that are provided on the semiconductor substrate on both sides of the gate electrode layer and contain conductive impurities;
- a first insulating layer provided on the semiconductor substrate;
- contacts that penetrate the first insulating layer and are provided respectively on the source or drain regions;
- a second insulating layer provided on the first insulating layer;
- wiring layers provided on the second insulating layer above the respective contacts;
- and
- low dielectric constant regions that are provided in the first insulating layer and the second insulating layer at respective locations between the contacts and the wiring layers and have dielectric constants lower than the first insulating layer and the second insulating layer, wherein
- the first insulating layer and the second insulating layer on surface sides provided with the low dielectric constant regions contain the impurity ions.
A method for manufacturing a semiconductor device comprising:
- forming a gate insulating film uniformly on a semiconductor substrate;
- forming a gate electrode layer uniformly on the gate insulating film;
- introducing impurity ions into the gate electrode layer;
- patterning the gate insulating film and the gate electrode layer;
- and
- introducing conductive impurities into the semiconductor substrates on both sides of the gate insulating film and the gate electrode layer to form source or drain regions in the semiconductor substrates, wherein
- a concentration of the impurity ions introduced into the gate electrode layer is higher than a concentration of the conductive impurities introduced into the source or drain regions.
A method for manufacturing a semiconductor device comprising:
- forming a gate insulating film uniformly on a semiconductor substrate;
- forming a gate electrode layer uniformly on the gate insulating film;
- patterning the gate insulating film and the gate electrode layer;
- introducing conductive impurities into the semiconductor substrate on both sides of the gate insulating film and the gate electrode layer to form source or drain regions in the semiconductor substrate;
- forming a first insulating layer on the semiconductor substrate;
- forming contacts penetrating the first insulating layer respectively on the source or drain regions;
- forming wiring layers on the respective contacts and forming a second insulating layer on the first insulating layer;
- forming openings for exposing the gate electrode layer in the first insulating layer and the second insulating layer between the contacts and the wiring layers;
- introducing impurity ions into the first insulating layer, the second insulating layer, and the gate electrode layer that are adjacent to the openings;
- and
- forming a third insulating layer that seals the openings on the second insulating layer.
Dependencies are inferred from the claim text.