Field Effect Transistor and Method for Manufacturing Same

A method for producing a field effect transistor comprising:

• a first step of epitaxially growing at least a buffer layer comprising a compound semiconductor lattice-matched to InP, an etching stop layer comprising InxAl1-xP (0≤x≤0.75) and having a thickness not more than a critical film thickness, and a channel layer comprising InyGa1-yAs (0<y≤1) on a substrate in this order;
• a second step of patterning the channel layer to form a mesa comprising the channel layer by an etching process in which etching is stopped at the etching stop layer;
• a third step of regrowing InzGa1-zAs (0<z≤1) on the etching stop layer on both sides of the mesa to form a first contact layer and a second contact layer;
• a fourth step of forming a gate electrode on an uppermost layer of the mesa;
• and
• a fifth step of forming a source electrode on the first contact layer and a drain electrode on the second contact layer.

A field effect transistor comprising:

• a buffer layer on a substrate and comprising a compound semiconductor lattice-matched to InP;
• an etching stop layer on the buffer layer and comprising InxAl1-xP (0≤x≤0.75);
• a mesa structure on the etching stop layer and comprising at least a channel layer, the channel layer comprising InyGa1-yAs (0<y≤1);
• a first contact layer and a second contact layer which on the etching stop layer on opposing sides of the mesa and comprising InzGa1-zAs (0<z≤1);
• a gate electrode on an uppermost layer of the mesa;
• a source electrode on the first contact layer;
• and
• a drain electrode formed on the second contact layer.

A method for producing a field effect transistor comprising:

• epitaxially growing a buffer layer on a substrate and comprising a compound semiconductor lattice-matched to InP;
• epitaxially growing an etching stop layer on the buffer layer and comprising InxAl1-xP (0≤x≤0.75);
• epitaxially growing a channel layer on the etching stop layer and comprising InyGa1-yAs (0<y≤1);
• patterning a mesa by an etching process, wherein patterning the mesa comprises patterning the channel layer, and wherein the etching process terminates at the etching stop layer;
• and
• regrowing InzGa1-zAs (0<z≤1) on the etching stop layer on opposing sides of the mesa to form a first contact layer and a second contact layer.