Source and drain epitaxy forming method capable of improving performance of finfet device

A method of forming a source and a drain epitaxy of an FinFET device, comprising:

• step 1:
• providing a fin device structure, including:
• forming a plurality of fin structures located on a substrate and arranged in a spaced manner in a longitudinal direction;
• wherein outer surfaces of the plurality of fin structures and the substrate are covered with a thin oxide layer;
• forming shallow trench isolation (STI) regions located between adjacent ones of the plurality of fin structures outside the thin oxide layer, wherein upper surfaces of the STI regions are lower than a top of the plurality of fin structures;
• wherein each of the plurality of fin structures comprises a first fin structure, wherein the first fin structure is higher than an upper surface of the STI regions ;
• and
• forming a plurality of gate structures on the substrate and arranged spaced out from each other in a transverse direction on the thin oxide layer on the outer surfaces of the plurality of fin structures;
• step 2:
• depositing sidewalls covering outer surfaces of the plurality of gate structures and the thin oxide layer on the outer surfaces of the plurality of fin structures;
• step 3:
• removing the sidewalls on top of the plurality of gate structures by etching, and removing sidewalls on second fin structures among the plurality of fin structures by etching;
• step 4:
• removing by etching the first fin structure from each of the second fin structures with the sidewalls removed in step 3, so as to form trenches at where the first fin structure is removed;
• step 5:
• removing by etching the thin oxide layer on sidewalls of the trenches to expand a volume of each of the trenches;
• and
• step 6:
• forming an epitaxial layer structure at the trenches.