Display panel, display panel manufacturing method, and display device
AssigneeHkc Corporation Limited
InventorHejing ZHANG
Life of this patent
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Abstract
The present application discloses a display panel, a display panel manufacturing method, and a display device. The display panel includes a source region and a drain region. A dielectric layer covering the source region and the drain region is provided with a first via hole and a second via hole separately. The first via hole is connected to the source region or the drain region, the second via hole is located on the top of the first via hole and is in communication with the first via hole, and an aperture of the second via hole is larger than an aperture of the first via hole.
Claims18
A display panel, comprising:
- a substrate;
- a buffer layer, formed on the substrate;
- a semiconductor layer, formed on the buffer layer, wherein the semiconductor layer comprises a source region, a drain region, and a channel region, and the channel region is arranged between the source region and the drain region;
- a gate insulating layer, formed at a position corresponding to the channel region of the semiconductor layer;
- a gate metal layer, formed on the gate insulating layer;
- and
- a dielectric layer, separately covering the buffer layer, the semiconductor layer, and the gate metal layer, wherein the dielectric layer correspondingly covering the source region and the drain region is provided with via holes separately, the via holes comprise a first via hole and a second via hole, the first via hole is connected to the source region or the drain region, the second via hole is located on the top of the first via hole and is in communication with the first via hole, and an aperture of the second via hole is larger than an aperture of the first via hole.
A display panel manufacturing method, comprising the following steps:
- providing a substrate and forming a buffer layer on the substrate;
- forming a semiconductor layer on the buffer layer, wherein the semiconductor layer comprises a source region, a drain region, and a channel region, and the channel region is arranged between the source region and the drain region;
- forming a gate insulating layer at a position corresponding to the channel region on the semiconductor layer;
- forming a gate metal layer on the gate insulating layer;
- depositing a dielectric layer on a surface of the gate metal layer, a surface of the semiconductor layer, and a surface of the buffer layer;
- and
- forming via holes respectively corresponding to the source region and the drain region on the dielectric layer, wherein
- the via holes comprise a first via hole and a second via hole, the first via hole is connected to the source region or the drain region, the second via hole is located on the top of the first via hole and is in communication with the first via hole, and an aperture of the second via hole is larger than an aperture of the first via hole.
A display device, comprising a display panel, wherein the display panel comprises:
- a substrate;
- a buffer layer, formed, on the substrate;
- a semiconductor layer, formed on the buffer layer, wherein the semiconductor layer comprises a source region, a drain region, and a channel region, and the channel region is arranged between the source region and the drain region;
- a gate insulating layer, formed at a position corresponding to the channel region of the semiconductor layer;
- a gate metal layer, formed on the gate insulating layer;
- and
- a dielectric layer, separately covering the buffer layer, the semiconductor layer, and the gate metal layer, wherein the dielectric layer correspondingly covering the source region and the drain region is provided with via holes separately, the via holes comprise a first via hole and a second via hole, the first via hole is connected to the source region or the drain region, the second via hole is located on the top of the first via hole and is in communication with the first via hole, and an aperture of the second via hole is larger than an aperture of the first via hole.
Dependencies are inferred from the claim text.