Radiation hardened high voltage superjunction mosfet

A high voltage superjunction MOSFET comprising:

• a semiconductor substrate having opposing first and second main surfaces and a first concentration of a first conductivity type;
• a semiconductor layer having opposing first and second main surfaces and including a first column of the first conductivity type and a second column of the second conductivity type opposite to the first conductivity type;
• a first trench formed completely through the semiconductor layer;
• a second trench formed completely through the semiconductor layer, wherein the first and second columns are disposed between the first trench and second trench, the first column having a second concentration of the first conductivity type that is less than the first concentration, the second column having a third concentration of the second conductivity type;
• an insulating material filling the first trench and second trench;
• a buffer layer disposed between the first main surface of the semiconductor substrate and the second main surface of the semiconductor layer, the buffer layer having a fourth concentration of the first conductivity type that is less than the first concentration;
• a plug region formed at the first main surface of the semiconductor layer and extending to the first and second columns, the plug region having a fifth concentration of the second conductivity type, the fifth concentration being greater than the third concentration;
• a source/drain region formed at the first main surface of the semiconductor layer and connected to the plug region, the source/drain region having a sixth concentration of the first conductivity type, the sixth concentration being between about 1×1019 cm−3 to about 1.5×1020 cm−3;
• a body region disposed between the source/drain region and the first column and connected to the plug region, the body region having a seventh concentration of the second conductivity type that is lower than the fifth concentration;
• a gate trench formed in the first main surface of the semiconductor layer and extending toward the first column, the source/drain region and the body region being adjacent a sidewall of the gate trench;
• a trench gate electrode disposed within the gate trench;
• and
• a dielectric layer at least partially disposed within the gate trench and separating the trench gate electrode from the first column.