Silicon epitaxial wafer production method and silicon epitaxial wafer
AssigneeSumco Corporation
InventorsMasayuki ISHIBASHI, Midori YOSHIDA, Daisuke MARUOKA
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Abstract
To provide a silicon epitaxial wafer production method and a silicon epitaxial wafer in which the DIC defects can be suppressed, a silicon epitaxial wafer production method is provided, in which an epitaxial layer is grown in a vapor phase on a principal plane of a silicon single crystal wafer. The principal plane is a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane. The silicon epitaxial wafer production method includes setting a temperature of the silicon single crystal wafer to 1140° C. to 1165° C. and growing the epitaxial layer in the vapor phase at a growth rate of 0.5 μm/min to 1.7 μm/min.
Claims8
A method for producing a silicon epitaxial wafer in which an epitaxial layer is grown in a vapor phase on a principal plane of a silicon single crystal wafer, the principal plane being a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane,
- the method comprising:
- setting a temperature of the silicon single crystal wafer to 1140° C. to 1165° C.;
- and
- growing the epitaxial layer in the vapor phase at a growth rate of 0.5 μm/min to 1.7 μm/min.
A silicon epitaxial wafer in which an epitaxial layer is grown on a silicon single crystal wafer having a principal plane that is a {110} plane or a plane having an off-angle of less than 1 degree from the {110} plane, wherein
- when observed using a differential interference contrast method, the epitaxial layer has microscopic step defects on a surface of 1.5 counts/300 mm wafer or less, and
- when observed using a white-light microscope, the epitaxial layer has a PV value of surface roughness of less than 10 nm.
Dependencies are inferred from the claim text.