Non-volatile semiconductor storage device and method of manufacturing the same

A semiconductor device comprising:

• a substrate;
• a plurality of first memory transistors connected in series and arranged in a first direction orthogonal to the substrate, the plurality of first memory transistors including a first channel body extending in the first direction;
• a plurality of second memory transistors connected in series and arranged in the first direction, the plurality of second memory transistors including a second channel body extending in the first direction, one of the plurality of first memory transistors and one of the plurality of second memory transistors being arranged in a second direction crossing the first direction;
• and
• a first transistor including a channel region extending in the second direction,
• wherein an extending projection of one of the plurality of first memory transistors in the first direction overlaps with the channel region of the first transistor in the first direction.

A semiconductor device comprising:

• a substrate;
• a plurality of first memory transistors connected in series and arranged in a first direction orthogonal to the substrate, the plurality of first memory transistors including a first channel body extending in the first direction, one of the plurality of first memory transistors including a first gate electrode;
• a plurality of second memory transistors connected in series and arranged in the first direction, the plurality of second memory transistors including a second channel body extending in the first direction, one of the plurality of first memory transistors and one of the plurality of second memory transistors being arranged in a second direction orthogonal to the first direction;
• a plurality of third memory transistors connected in series and arranged in the first direction, the plurality of third memory transistors including a third channel body extending in the first direction, a first end of the third channel body being connected with the first channel body, a second end of the third channel body being connected with a first bit line, a width of the second end of the third channel body being larger than a width of the first channel body at an end closest to the substrate;
• a plurality of fourth memory transistors connected in series and arranged in the first direction, the plurality of fourth memory transistors including a fourth channel body extending in the first direction, a first end of the fourth channel body being connected with the second channel body, a second end of the fourth channel body being connected with a second bit line, a width of the second end of the fourth channel body being larger than a width of the second channel body at an end closest to the substrate, the one of the plurality of third memory transistors and one of the plurality of fourth memory transistors being arranged in the second direction;
• and
• a first transistor including a second gate electrode and a channel region extending in the second direction,
• wherein an extending projection of the first gate electrode in the first direction overlaps with the second gate electrode in the first direction.