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US 2022/0028835 A1Published application
Interlayer connection of stacked microelectronic components
AssigneeInvensas Bonding Technologies, Inc.
InventorsGuilian GAO, Belgacem HABA
Life of this patent
Estimating the term…
Abstract
Representative techniques and devices including process steps may be employed to form a common interconnection of a multi-die or multi-wafer stack. Each device of the stack includes a conductive pad disposed at a predetermined relative position on a surface of the device. The devices are stacked to vertically align the conductive pads. A through-silicon via is formed that electrically couples the conductive pads of each device of the stack.
Claims23
A microelectronic assembly, comprising:
- a plurality of microelectronic substrates, comprising at least three microelectronic substrates, direct bonded to form a vertical stack of microelectronic substrates;
- a conductive pad disposed at a first relative position on a surface of each of the plurality of microelectronic substrates, the conductive pad of each subsequent microelectronic substrate of the vertical stack of microelectronic substrates is intentionally offset a predetermined distance relative to the conductive pad on the surface of a previously placed microelectronic substrate of the vertical stack of microelectronic substrates;
- and
- a cavity extending through an interior area of the conductive pad of at least all but one of the plurality of microelectronic substrates.
1 more element
A microelectronic assembly, comprising:
- a plurality of microelectronic substrates, comprising at least three microelectronic substrates, stacked to form a vertical stack of microelectronic substrates;
- a conductive pad disposed on a surface of each of the plurality of microelectronic substrates, the conductive pad on the surface of each subsequent microelectronic substrate of the plurality of microelectronic substrates intentionally offset a predetermined distance relative to the conductive pad on the surface of a previously placed microelectronic substrate of the plurality of microelectronic substrates;
- and
- a cavity extending through an interior area of the conductive pad of at least all but one of the microelectronic substrates of the plurality of microelectronic substrates.
1 more element
A microelectronic assembly, comprising:
- a plurality of microelectronic substrates, comprising at least three microelectronic substrates, stacked to form a vertical stack of microelectronic substrates, each of the microelectronic substrates of the vertical stack of microelectronic substrates being misaligned with respect to at least one other microelectronic substrate of the vertical stack of microelectronic substrates;
- a conductive pad disposed at a first relative position on a surface of each of the plurality of microelectronic substrates;
- a cavity extending through an interior area of the conductive pad of at least all but one of the plurality of microelectronic substrates;
- and
- a conductive material filled within the cavity to form a through silicon via (TSV) common to each of the microelectronic substrates of the vertical stack of microelectronic substrates, the TSV comprising an interlayer connection electrically coupling the conductive pad on the surface of each of the plurality of microelectronic substrates.
2 more elements
Dependencies are inferred from the claim text.