Semiconductor device having contact plug connected to gate structure on pmos region

A semiconductor device, comprising:

• a substrate having a NMOS region and a PMOS region;
• a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate;
• a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region;
• a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region;
• a first contact plug landing on the second source/drain region adjacent to one side of the metal gate;
• a second contact plug landing on the second source/drain region adjacent to another side of the metal gate;
• and
• a third contact plug landing directly on a portion of the metal gate on the PMOS region and between the second source/drain region and a boundary separating the NMOS region and the PMOS region.

A semiconductor device, comprising:

• a substrate having a NMOS region and a PMOS region;
• a metal gate extending continuously along a first direction from the NMOS region to the PMOS region on the substrate;
• a first source/drain region extending along a second direction adjacent to two sides of the metal gate on the NMOS region;
• a second source/drain region extending along the second direction adjacent to two sides of the metal gate on the PMOS region;
• a first contact plug landing on the second source/drain region adjacent to one side of the metal gate;
• a second contact plug landing on the second source/drain region adjacent to another side of the metal gate;
• and
• a third contact plug landing directly on a portion of the metal gate on the PMOS region and not between the first source/drain region and the second source/drain region and away from a boundary separating the NMOS region and the PMOS region.