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US 2022/0028468 A1Published application
Memory device and memory system
AssigneeSamsung Electronics Co., Ltd.
InventorYONG-SUNG CHO
Life of this patent
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Abstract
A memory device includes a memory cell array including a plurality of memory cells on which a programming loop is executed a plurality of times; a voltage generator configured to apply a verifying voltage to the memory cells, for verifying at least one programming state of the memory cells; and a voltage controller configured to control the voltage generator to change a level of the verifying voltage as a program loop count increases, based on temperature information about a temperature inside or outside the memory device.
Claims20
An apparatus comprising:
- a plurality of memory cells connected to a word line and having different temperature coefficients, the plurality of memory cells including a first memory cell and a second memory cell, the first memory cell being in a first NAND string that is connected to a first bit line, the second memory cell being in a second NAND string that is connected to a second bit line;
- a controller configured to program threshold voltages of the plurality of memory cells based on the different temperature coefficients;
- and
- a temperature information generator configured to provide temperature information indicating a temperature of the plurality of memory cells to the controller,
- wherein a first threshold voltage of the first memory cell under a first temperature is different from a second threshold voltage of the second memory cell under a second temperature that is different from the first temperature,
- the controller is configured to perform a plurality of program loops, each of the plurality of program loops including a programming operation and a verifying operation, and
- in each of the plurality of program loops, a programming voltage is applied to the word line, and a verifying voltage is applied to the word line after the programming voltage is applied to the word line.
4 more elements
A method comprising:
- applying, in each of a plurality of program loops, a programming voltage to a plurality of memory cells connected to a word line and having different temperature coefficients, the plurality of memory cells including a first memory cell and a second memory cell, the plurality of program loops including a first loop and a second loop that is performed after the first loop;
- and
- performing a verifying operation for the plurality of memory cells by applying a verifying voltage to the plurality of memory cells,
- wherein the verifying operation for the first memory cell under a first temperature is different from the verifying operation for the second memory cell under a second temperature that is different from the first temperature, and
- a first verifying voltage in the first loop is different from a second verifying voltage in the second loop.
2 more elements
An apparatus comprising:
- a plurality of memory cells connected to a word line and having different temperature coefficients, the plurality of memory cells including a first memory cell and a second memory cell, the first memory cell being in a first NAND string that is connected to a first bit line, the second memory cell being in a second NAND string that is connected to a second bit line;
- and
- a controller configured to program threshold voltages of the plurality of memory cells based on the different temperature coefficients, and configured to program each of the plurality of memory cells using a verifying operation.
Dependencies are inferred from the claim text.