US 2022/0028457 A1Published application

Memory system, memory device, and method for operating memory device

AssigneeSK hynix Inc.

InventorChi Je PARK

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Abstract

Embodiments of the disclosed technology relate to a memory system, a memory device, and a method for operating the memory device. Based on embodiments of the disclosed technology, when programming data in a first memory cell in a first memory block in a turbo program mode, the memory device may apply a first number of program pulses to the first memory cell, the first number of program pulses being smaller than the number of program pulses applied to the first memory cell when data is written to the first memory cell when the turbo program mode is reset. When migrating the data written to the first memory cell to a second memory cell in a second memory block, the memory device may apply a second number of program pulses to the second memory cell, the second number of program pulses being larger than the first number of program pulses.

Claims16

Dependent claims

A memory system comprising:

a memory device comprising a first memory block and a second memory block, each of the first and second memory blocks including memory cells for storing data and operable to perform an operation on one or more memory cells, including a read operation for reading data stored in one or more memory cells and a program operation for writing new data into one or more memory cells;
and
a memory controller in communication with the memory device and configured to control the memory device to perform an operation, wherein the memory controller is configured to determine whether to set or reset a turbo program mode, and configured to determine, in the turbo program mode, a number of program pulses applied when data is written to the first memory block,
wherein the memory device is configured to:
apply a first number of program pulses to a first memory cell included in the first memory block when writing data into the first memory cell in a state in which the turbo program mode is set;
and
apply a second number of program pulses to a second memory cell included in the second memory block when migrating the data from the first memory cell to the second memory cell,
wherein the first number of program pulses is smaller than a number of program pulses applied when data is written to the first memory cell in a state in which the turbo program mode is reset, and
wherein the second number of program pulses is larger than the first number of program pulses.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/157,630Filed 25 Jan 2021
Priority: KR 10-2020-009286827 Jul 2020
Published: 27 Jan 2022
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

G11C 16/10
Auxiliary circuits, e.g. for writing into memory: programming or data input circuits
G11C 11/5628
Using charge storage in a floating gate: programming or writing circuits; Data input circuits
G11C 16/26
Auxiliary circuits, e.g. for writing into memory: sensing or reading circuits; Data output circuits
G11C 16/30
Auxiliary circuits, e.g. for writing into memory: power supply circuits