Circuits for power down leakage reduction in random-access memory

A method of reducing leakage during a power down mode in a wordline driver circuit of a random-access memory (RAM), the method comprising:

• disconnecting a first set of wordlines from a first voltage by turning off a first switch in a strap buffer that defines a header, wherein the strap buffer is in a pre-driver stage;
• disconnecting a second set of wordlines from the first voltage by turning off a third switch in the strap buffer;
• and
• disconnecting the second set of wordlines from a second voltage by turning off a second switch in an input-output buffer that defines a footer, wherein the input-output buffer is in the pre-driver stage.

A wordline driver circuit for a random-access memory (RAM), the wordline driver circuit comprising:

• a pre-driver stage comprising:
• a strap buffer defining a header and comprising a first switch that is configured to disconnect a first set of wordlines from a first voltage during a power down mode and a third switch that is configured to disconnect a second set of wordlines from the first voltage during the power down mode;
• and
• an input-output buffer defining a footer and comprising a second switch that is configured to disconnect the second set of wordlines from a second voltage during the power down mode.