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US 2022/0028432 A1Published application
Semiconductor apparatus and semiconductor memory apparatus
AssigneeSK hynix Inc.
InventorHyun Chul LEE
Life of this patent
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Abstract
A semiconductor apparatus including a sudden power detection circuit, a power-on reset circuit, and a driving circuit. The sudden power detection circuit configured to detect an external power supply voltage and generate a sudden power detection signal. The power-on reset circuit configured to detect the voltage level of the external power supply voltage according to a reset reference voltage and generate a power-on reset signal. The driving circuit configured to perform a sudden power-off operation and a power-on reset operation.
Claims20
A semiconductor apparatus comprising:
- a sudden power detection circuit enabled based on an enable signal and configured to detect a voltage level of an external power supply voltage and generate a sudden power detection signal;
- a power-on reset circuit configured to set a reset reference voltage for a power-on reset operation based on the enable signal and a power-on reset signal, to detect the voltage level of the external power supply voltage according to the reset reference voltage, and to generate the power-on reset signal;
- and
- a driving circuit configured to perform a sudden power-off operation based on the sudden power detection signal and to perform the power-on reset operation based on the power-on reset signal.
1 more element
A semiconductor memory apparatus comprising:
- a sudden power detection circuit enabled based on an enable signal and configured to detect a voltage level of an external power supply voltage and generate a sudden power detection signal;
- a power-on reset circuit configured to set a reset reference voltage for a power-on reset operation based on the enable signal and a power-on reset signal, to detect the voltage level of the external power supply voltage according to the reset reference voltage, and to generate the power-on reset signal;
- and
- a discharging circuit configured to perform a discharging operation on a line connected to a memory cell, based on the sudden power detection signal.
1 more element
Dependencies are inferred from the claim text.